This is a proposal for additional switches to be included on the command line
to prevent inclusion of processor supplementary instructions. This enhancement
provides greater support for compilation of code to be utilized between
different generations of CPU.
Proposed switches:
--nocpuid This option causes the compiler to not generate cpuid opcodes
--nocmov This option causes the compiler to not generate cmov opcodes
--nofcmov This option causes the compiler to not generate fcmov opcodes
--nofcomi This option causes the compiler to not generate fcomi opcodes
--nonopl This option causes the compiler to not generate fcomi opcodes
--nordpmc This option causes the compiler to not generate rdpmc opcodes
--nordtsc This option causes the compiler to not generate rdtsc opcodes
Possibly a general switch that is equivalent to all of the above
--nosupplementaryinstructions
Rationale
It is possible that a developer still wants to compile for a particular
architecture (for example the i486), but does not wish to generate code with
supplementary instructions (such as cpuid), that may be present on that
architecture.
--
Summary: Additional switches to disallow processor supplementary
instructions
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component: inline-asm
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: markhobley at yahoo dot co dot uk
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38959
