[Bug c/27628] Incorrect memory access type used used in accessing bitfields

[frikkie at zitera dot co dot za]

------- Comment #5 from frikkie at zitera dot co dot za  2009-01-06 09:07 
-------
Good day,

This behavior was verified by me on an ST STR912 ARM9, running GCC v4.3.2
(target: arm-none-eabi)

The attached snippets of disassembler still shows the incorrect assembler
instructions:

--CODE--

#define __REG32 volatile unsigned long
typedef volatile struct __attribute__(__packed__)) 
{
  __REG32 PLL_MDIV:8;   // [7:0]   PLL Pre-divider
  __REG32 PLL_NDIV:8;   // [15:8]  PLL Feedback divider
  __REG32 PLL_PDIV:3;   // [18:16] PLL Post-divider
  __REG32 PLL_EN:1;     // [19]    PLL Enable (0=off, 1=on)

  __REG32 uwPAD:12;     // [31:20] -PADDING-
}__Bitfield;

#define ADDRESS 0x5c002004
#define REG (*( __REG32 *)(ADDRESS))
#define REG_bit (*(__Bitfield *)&REG)

REG_bit.PLL_MDIV=0x80;
REG_bit.PLL_NDIV=0x10;
REG_bit.PLL_PDIV=0x2;
REG_bit.PLL_EN=1;

--CODE--

--Disassembly--
  Attached as PNG image: GCC432_disassembly.png
--Disassembly--


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27628