------- Comment #1 from ubizjak at gmail dot com 2008-11-24 22:35 -------
OK, we need a full memory clobber, as in sse2_mfence case.
I'm testing this patch:
Index: sync.md
===================================================================
--- sync.md (revision 142160)
+++ sync.md (working copy)
@@ -36,19 +36,22 @@
(unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
""
{
- if (!TARGET_SSE2)
- {
- /* Emit a locked no-operation when SSE2 is not available. */
- int slot = virtuals_instantiated ? SLOT_TEMP : SLOT_VIRTUAL;
- rtx temp = assign_386_stack_local (QImode, slot);
- emit_insn (gen_sync_iorqi (temp, CONST0_RTX (QImode)));
- DONE;
- }
-
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
})
+(define_insn "*memory_barrier_nosse"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
+ "!TARGET_SSE2"
+{
+ if (TARGET_64BIT)
+ return "lock{%;| }or{q}\t{$0, (%%rsp)|QWORD PTR [rsp], 0}";
+ else
+ return "lock{%;| }or{l}\t{$0, (%%esp)|DWORD PTR [esp], 0}";
+}
+ [(set_attr "memory" "unknown")])
+
;; ??? It would be possible to use cmpxchg8b on pentium for DImode
;; changes. It's complicated because the insn uses ecx:ebx as the
;; new value; note that the registers are reversed from the order
--
ubizjak at gmail dot com changed:
What |Removed |Added
----------------------------------------------------------------------------
AssignedTo|unassigned at gcc dot gnu |ubizjak at gmail dot com
|dot org |
Status|UNCONFIRMED |ASSIGNED
Ever Confirmed|0 |1
Last reconfirmed|0000-00-00 00:00:00 |2008-11-24 22:35:07
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38254
