------- Comment #11 from steven at gcc dot gnu dot org 2008-03-03 19:35 -------
Quoting your insn once more:
(insn 58 57 59 6 gnu/java/nio/natVMSelector.cc:82 (parallel [
(set (reg:DI 4 si [165])
(mult:DI (zero_extend:DI (reg:SI 0 ax))
(zero_extend:DI (reg:SI 2 cx [166]))))
(clobber (reg:CC 17 flags))
]) 304 {*umulsidi3_insn} (expr_list:REG_DEAD (reg:SI 2 cx [166])
(expr_list:REG_DEAD (reg:SI 0 ax)
(expr_list:REG_UNUSED (reg:CC 17 flags)
(expr_list:REG_EQUAL (mult:DI (zero_extend:DI (reg:SI 0 ax))
(const_int 1000 [0x3e8]))
(nil))))))
The register allocator failed to make your insn satisfy its constraints.
Operand 0 is (reg:DI 4 si) but the constraint for it is "=A", i.e. the ax
register.
The funny thing is that reload wants to make operand 0 be (reg:DI 0 ax), but
somehow it can't, even though (reg:SI 0 ax) dies in this insn. So apparently
the high part of (reg:DI 0 ax), i.e. (reg:SI 1 dx), lives across the insn.
This looks to me like a case of PR35404. What do you think, Ian?
--
steven at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
GCC build triplet| |[EMAIL PROTECTED],
| |[EMAIL PROTECTED]
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19020
