[Bug inline-asm/35160] New: [4.3 regression] CSE introduces sharing of the same pseudo/hard reg between different output regs in inline asm

[jakub at gcc dot gnu dot org]

On x86_64 with -O1 and higher, 4.3 miscompiles:
extern void abort (void);

void
__attribute__((noinline))
foo (unsigned long *y)
{
   unsigned long b[3], c0, c1, c2, d0, d1, d2;
   d0 = 0; d1 = 0; d2 = 0; c0 = c1 = c2 = 0;

   __asm__ ("movl $7, %k0; movl $8, %k1; movl $9, %k2"
            : "+r" (d0), "+r" (d1), "+r" (d2));
   __asm__ ("movq %3, %0; movq %4, %1; movq %5, %2"
            : "+r" (c0), "+r" (c1), "+r" (c2), "+r" (d0), "+r" (d1), "+r"
(d2));
   y[0] = c0;
   y[1] = c1;
   y[2] = c2;
}

int
main (void)
{
  unsigned long y[3];
  foo (y);
  if (y[0] != 7 || y[1] != 8 || y[2] != 9)
    abort ();
  return 0;
}
First CSE pass assigns the same pseudo to different output regs.  It would be
fine if those were input only registers.
Happens both with "+r" and "=r" ... "0" syntax.


-- 
           Summary: [4.3 regression] CSE introduces sharing of the same
                    pseudo/hard reg between different output regs in inline
                    asm
           Product: gcc
           Version: 4.3.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: inline-asm
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: jakub at gcc dot gnu dot org


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35160