------- Comment #5 from hjl at lucon dot org 2007-10-06 02:07 ------- Kenny, does your patch
http://gcc.gnu.org/ml/gcc-patches/2007-10/msg00124.html handle cases where number of consecutive hard regs needed to hold some mode > 1 correctly? IA32 needs 2 hard registers to hold long long and your patch miscompiles the testcase in comment #4. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33669
