------- Comment #10 from hjl at lucon dot org 2007-04-05 20:05 ------- (In reply to comment #9) > (In reply to comment #8) > > > > Please also change operands 1 and 2 of sdot_prodv8hi expander to > > > register_operand to avoid further suprises. > > > > > > > I am not sure if there is an issue since op0 of sse2_pmaddwd must be > > register and it must be the same as op1 or op2. > > But only after reload. Nothing prevents gcc to generate two MEM input > operands. > Although reload will fix this by putting one of input operands into register > (and match it with output operand), but this will be too late for any > pre-reload pass to make any optimization on inputs. >
Will something like --- sse.md.pmaddwd 2007-04-04 17:44:43.000000000 -0700 +++ sse.md 2007-04-05 12:02:28.000000000 -0700 @@ -3044,7 +3044,7 @@ (match_operand:V8HI 1 "nonimmediate_operand" "") (match_operand:V8HI 2 "nonimmediate_operand" "") (match_operand:V4SI 3 "register_operand" "")] - "TARGET_SSE2" + "TARGET_SSE && !(MEM_P (operands[1]) && MEM_P (operands[2]))" { rtx t = gen_reg_rtx (V4SImode); emit_insn (gen_sse2_pmaddwd (t, operands[1], operands[2])); work? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31478