I found the following problem in rs6000.md:
(define_insn "*movti_ppc64"
[(set (match_operand:TI 0 "nonimmediate_operand" "=r,o<>,r")
(match_operand:TI 1 "input_operand" "r,r,m"))]
"TARGET_POWERPC64 && (gpc_reg_operand (operands[0], TImode)
|| gpc_reg_operand (operands[1], TImode))"
"#"
[(set_attr "type" "*,load,store")])
It appears that the order of the load and store attributes in the set_attr
expression is incorrect. If operand 0 is memory (o<>) and operand 1 is a
register (r), the instruction should be a store, not a load. Similarly, if
operand 0 is a register ("r") and operand 1 memory ("m"), the instruction
should be load, not a store.
I think either the constraint order or the attribute order need to be reversed
to make constraints and attributes match.
--
Summary: incorrect attributes in *movti_ppc64 of rs6000.md
Product: gcc
Version: 4.1.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: dkwan at transmeta dot com
GCC build triplet: x86_64-unknown-linux-gnu
GCC host triplet: x86_64-unknown-linux-gnu
GCC target triplet: ppu-unknown-lv2
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=30451
