Hi. I've a reduced test case showing that a function like:
struct x { uint8_t a; uint16_t b; }; f(struct x *y) ... will expect that 'y' is correctly aligned: it uses 'ldrh' to access y->b and ldrh documentation says "if the memory is not halfworld-aligned and no data abort occurs, the value written to the destination register is unpredictable." Test case: typedef unsigned char uint8_t; typedef unsigned short int uint16_t; struct x { uint16_t d; uint8_t c; }; int f(struct x *y) { diag_printf("y=%p y->c=%d(0x%x) y->d=%d(0x%x)\n\r",y,y->c,y->c,y->d,y->d); } int main(int argc,char **argv ) { void *s=malloc(sizeof(struct x)+1); struct x *y; s++; // <- problem origin y=s; y->c=0xAA; y->d=0xBBCC; f(y); while(1); } Without "s++;": y=0x000088e0 y->c=170(0xaa) y->d=48076(0xbbcc) With "s++;": y=0x000088e1 y->c=170(0xaa) y->d=-872415045(0xcc0000bb) Generated code with -Os is: int f(struct x *y) { 40000698: b500 push {lr} diag_printf("y=%p y->c=%d(0x%x) y->d=%d(0x%x)\n\r",y,y->c,y->c,y->d,y->d); 4000069a: 7883 ldrb r3, [r0, #2] 4000069c: 8802 ldrh r2, [r0, #0] <--- *HERE* 4000069e: b082 sub sp, #8 400006a0: 9200 str r2, [sp, #0] 400006a2: 9201 str r2, [sp, #4] 400006a4: 1c01 mov r1, r0 (add r1, r0, #0) 400006a6: 1c1a mov r2, r3 (add r2, r3, #0) 400006a8: 4802 ldr r0, [pc, #8] (400006b4 <.text+0x674>) 400006aa: ff4ff002 bl 4000354c <diag_printf> } 400006ae: b002 add sp, #8 400006b0: bc02 pop {r1} 400006b2: 4708 bx r1 400006b4: 98e4 ldr r0, [sp, #912] 400006b6: 4000 and r0, r0 Tested on arm-elf-gcc 3.4.4, 3.4.6, 4.1.1, the latest two with and without the patch related to bug 29373. Thanks for your help. -- Summary: [3.4.4/3.4.6/4.1.1] ARM structure pointer alignment problem with optimization Product: gcc Version: 4.1.1 Status: UNCONFIRMED Severity: major Priority: P3 Component: c AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: bernard dot fouche at kuantic dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29938