------- Comment #2 from ubizjak at gmail dot com 2006-11-10 10:54 -------
(In reply to comment #0)
> The Test instruction applied to the rCX register followed by a Jump if Zero
> with an 8-bit displacement can be replaced by a single JCXZ/JECXZ/JRCXZ
The problem is in "with an 8-bit displacement". This displacement is calculated
during assembler stage, and there is no way to _reliably_ calculate
displacement using gcc's "(pc)" RTX.
To implement this optimization, some support from assembler is needed. When
displacement overflows 8bit, assembler should substitute "jecxz" with
equivalent "test/jmp rel{16,32}" sequence.
This 8-bit displacement problem is in fact the same problem as with "loop"
insn.
However, it would be nice to have "jexcz" and "loop" insns, as they all have
zero latency (as jcc insn have) on p4.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793
