> In x86/x86-64 world one can be almost sure that the load+execute instruction
> pair will execute (marginaly to noticeably) faster than move+load-and-execute
> instruction pair as the more complex instructions are harder for on-chip
> scheduling (they retire later).
^^^ retirement filling up the scheduler
easilly.
> Perhaps we can move such a transformation somewhere more generically perhaps
> to
> post-reload copyprop?
>
> Honza
- [Bug target/27827] [4.0/4.1 Regre... bonzini at gnu dot org
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... paolo dot bonzini at lu dot unisi dot ch
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... paolo dot bonzini at lu dot unisi dot ch
- [Bug target/27827] [4.0/4.1 Regre... dorit at il dot ibm dot com
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... hubicka at gcc dot gnu dot org
- Re: [Bug target/27827] [4.0/... Jan Hubicka
- [Bug target/27827] [4.0/4.1 Regre... hubicka at ucw dot cz
- [Bug target/27827] [4.0/4.1 Regre... paolo dot bonzini at lu dot unisi dot ch
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... paolo dot bonzini at lu dot unisi dot ch
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- [Bug target/27827] [4.0/4.1 Regre... whaley at cs dot utsa dot edu
- Re: [Bug target/27827] [4.0/... Dorit Nuzman
- [Bug target/27827] [4.0/4.1 Regre... dorit at il dot ibm dot com
