------- Comment #4 from pluto at agmk dot net 2006-03-02 14:32 -------
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24592.pdf
page 33:
[ Zero-Extension of 32-Bit Results. ]
(...) when performing 32-bit operations with a GPR destination
in 64-bit mode, the processor zero-extends the 32-bit result
into the full 64-bit destination. 8-bit and 16-bit operations on GPRs
preserve all unwritten upper bits of the destination GPR.
This is consistent with legacy 16-bit and 32-bit semantics for
partial-width results.
Software should explicitly sign-extend the results of 8-bit, 16-
bit, and 32-bit operations to the full 64-bit width before using
the results in 64-bit address calculations.
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pluto at agmk dot net changed:
What |Removed |Added
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CC| |pluto at agmk dot net
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=26457
