------- Comment #13 from steven at gcc dot gnu dot org 2005-10-28 15:58 -------
Smaller test case:
// Compile with -O2 -maltivec
//
// Works with GCC 3.3.5 and GCC 4.0.2
// ICEs with GCC 4.1 from today's CVS
#include <altivec.h>
#define REGLIST \
"77", "78", "79", "80", "81", "82", "83", "84", "85", "86",\
"87", "88", "89", "90", "91", "92", "93", "94", "95", "96",\
"97", "98", "99", "100", "101", "102", "103", "104", "105", "106",\
"107", "108"
void
foo (int H)
{
volatile __attribute__ ((altivec (vector__))) unsigned char tmp;
while (H-- > 0)
{
asm ("" : : : REGLIST);
tmp =
( __attribute__ ((altivec (vector__))) unsigned
char) (( __attribute__ ((altivec (vector__))) unsigned short)
vec_splat_s16 (((5))));
}
}
Note that this is really a register allocation problem that we fail on because
our register allocator doesn't know about liveness inside blocks, only at the
start and end of a block. But the situation is easily reproducible as long as
you pump the register pressure up far enough.
The problem seems to be in reload const-to-mem. We start with this:
(insn:HI 26 22 56 2 (set (mem/v/c/i:V16QI (plus:SI (reg/f:SI 113 sfp)
(const_int 16 [0x10])) [0 tmp+0 S16 A128])
(subreg:V16QI (reg:V8HI 128) 0)) 467 {altivec_stvx_v16qi}
(insn_list:REG_DEP_TRUE 22 (nil))
(expr_list:REG_EQUAL (const_vector:V16QI [
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
])
(nil)))
and we end with this (were we ICE on insn 65):
(insn 65 22 64 2 (set (reg:V16QI 77 0)
(mem/u/c/i:V16QI (symbol_ref/u:SI ("*.LC0") [flags 0x2]) [0 S16 A128]))
-1 (nil)
(nil))
(insn 64 65 26 2 (set (reg:SI 9 9)
(plus:SI (reg/f:SI 1 1)
(const_int 16 [0x10]))) 31 {*addsi3_internal1} (nil)
(nil))
(insn:HI 26 64 56 2 (set (mem/v/c/i:V16QI (reg:SI 9 9) [0 tmp+0 S16 A128])
(reg:V16QI 77 0)) 467 {altivec_stvx_v16qi} (insn_list:REG_DEP_TRUE 22
(nil))
(expr_list:REG_EQUAL (const_vector:V16QI [
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
(const_int 0 [0x0])
(const_int 5 [0x5])
])
(nil)))
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24230
