------- Additional Comments From pinskia at gcc dot gnu dot org 2005-08-17 23:53 ------- from the gcc-patches (since the archives look broken):
looking on recent copy of Intel optimization manual, it has the same hint as AMD manual about 4 jumps per cache line. I did SPEC run on the P4 and there is no change except for bzip2 that improves by about 3%, that is quite expected as the scenario where 5 jumps happens to be in same window is very rare. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23448
