The older version of gcc produces corret code e.g.:
arm-elf-gcc-3.4.4 -g -Os -fPIC -mthumb -mlittle-endian -mapcs \
-march=armv4t -mcallee-super-interworking \
-c progWord.c -o 3_4_4_thumb.o
3_4_4_thumb.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <progWord>:
0: e38fc001 orr ip, pc, #1 ; 0x1
4: e12fff1c bx ip
00000008 <.real_start_ofprogWord>:
8: b570 push {r4, r5, r6, lr}
.
register r10 (sl) never been used
.
52: 2000 movs r0, #0
54: bc70 pop {r4, r5, r6}
56: bc02 pop {r1}
58: 4708 bx r1
The newer version did not generats the correct code
arm-elf-gcc-4.0.1 -g -Os -fPIC -mthumb -mlittle-endian -mapcs \
-march=armv4t -mcallee-super-interworking \
-c progWord.c -o 4_0_1_thumb.o
4_0_1_thumb.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <progWord>:
0: e38fc001 orr ip, pc, #1 ; 0x1
4: e12fff1c bx ip
00000008 <.real_start_ofprogWord>:
8: b570 push {r4, r5, r6, lr}
a: 4656 mov r6, sl
c: b440 push {r6}
.
register r10 (sl) never been used
.
56: 2000 movs r0, #0
58: bc04 pop {r2}
5a: 4692 mov sl, r2
5c: bd70 pop {r4, r5, r6, pc}
After the pop istuction the processor is still in thumb mode but it should be
in ARM mode.
The pop instuction might work in Archiceture version 5 and above but not in
architecture version 4.
The register sl isn't used within the function so push and pop of this not what
I'm expecting if switch -Os is given.
I can't distinguish if this is a resulting bug of the pervious or an extra
optimisation bug.
--
Summary: 4.0.1 switch -mcallee-super-interworking generating
wrong code for ARM7TDMI
Product: gcc
Version: 4.0.1
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: th dot r dot klein at web dot de
CC: gcc-bugs at gcc dot gnu dot org
GCC host triplet: i386-elf-freebsd
GCC target triplet: arm-elf
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23250
