I am enclosing a small test case. This is on Cray T3E, big endian alpha.
---- source code ----
#define SHARED_PTR_SIZE 128
#define SHARED_PTR_PHASE_SIZE 48
#define SHARED_PTR_THREAD_SIZE 16
#define SHARED_PTR_VIRTADDR_SIZE 64
typedef struct shared_ptr_struct
{
unsigned long phase : SHARED_PTR_PHASE_SIZE;
unsigned thread : SHARED_PTR_THREAD_SIZE;
void *addr;
} shared_ptr_t;
typedef shared_ptr_t *shared_ptr_p;
shared_ptr_t x;
main ()
{
x.thread = 2;
}
----- error reported -----
> gcc -da -c alpha_bug.c
alpha_bug.c: In function `main':
alpha_bug.c:21: error: unrecognizable insn:
(insn 14 13 15 0 (set (reg:DI 73)
(plus:DI (plus:DI (reg/f:DI 71)
(const_int 6 [0x6]))
(const_int 1 [0x1]))) -1 (nil)
(nil))
alpha_bug.c:21: internal compiler error: in ?, at recog.c:2083
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://www.intrepid.com/upc/bugs.html> for instructions.
----- alpha.c/md code that produces RTL in question -----
The following call to get_unaligned_address returns
(plus:DI (reg/f:DI 71)
(const_int 6 [0x6]))
which is passed as the first argument of the gen_unaligned_storehi()
2929 /* Expand a non-bwx QImode or HImode move instruction;
2930 return true if all work is done. */
2931
2932 bool
2933 alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands)
2934 {
...
3040 rtx temp1 = gen_reg_rtx (DImode);
3041 rtx temp2 = gen_reg_rtx (DImode);
3042 rtx temp3 = gen_reg_rtx (DImode);
3043 rtx seq = ((mode == QImode
3044 ? gen_unaligned_storeqi
3045 : gen_unaligned_storehi)
3046 (get_unaligned_address (operands[0], 0),
3047 operands[1], temp1, temp2, temp3));
3048
3049 alpha_set_memflags (seq, operands[0]);
3050 emit_insn (seq);
3051 }
Later on, gen_unaligned_storehi() creates the offending unrecognizable INSN with
the
following code:
(define_expand "unaligned_storehi_be"
[(set (match_operand:DI 3 "register_operand" "")
(mem:DI (and:DI (match_operand:DI 0 "address_operand" "")
(const_int -8))))
(set (match_operand:DI 2 "register_operand" "")
(plus:DI (match_dup 0) (const_int 1))) <<<<<<<<=======
(set (match_dup 3)
(and:DI (not:DI (ashift:DI
(const_int 65535)
(minus:DI (const_int 56)
(ashift:DI (match_dup 2) (const_int 3)))))
(match_dup 3)))
(set (match_operand:DI 4 "register_operand" "")
(ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" ""))
(minus:DI (const_int 56)
(ashift:DI (match_dup 2) (const_int 3)))))
(set (match_dup 4) (ior:DI (match_dup 4) (match_dup 3)))
(set (mem:DI (and:DI (match_dup 0) (const_int -8)))
(match_dup 4))]
"WORDS_BIG_ENDIAN"
"")
If I change line 3043 in alpha.c to load unaligned address of operand[0] into
the
register and pass it to unaligned_storehi() everything works.
----- RTL dump 01.rtl -----
;; Function main
(note 2 0 3 NOTE_INSN_DELETED)
(note 3 2 4 NOTE_INSN_FUNCTION_BEG)
(note 4 3 5 NOTE_INSN_DELETED)
(insn 5 4 6 (set (reg:DI 70)
(symbol_ref:DI ("__main") [flags 0x41])) -1 (nil)
(nil))
(insn 6 5 7 (set (reg:DI 25 $25)
(unspec:DI [
(const_int 0 [0x0])
] 9)) -1 (nil)
(nil))
(call_insn 7 6 8 (parallel [
(call (mem:DI (reg:DI 70) [0 S8 A64])
(unspec:DI [
(const_int 0 [0x0])
] 9))
(use (reg:DI 25 $25))
(clobber (reg:DI 26 $26))
]) -1 (nil)
(expr_list:REG_EH_REGION (const_int 0 [0x0])
(nil))
(nil))
(note 8 7 9 40007161440 NOTE_INSN_BLOCK_BEG)
(note 9 8 11 NOTE_INSN_DELETED)
(insn 11 9 12 (set (reg/f:DI 71)
(symbol_ref:DI ("x") [flags 0x2] <var_decl 40014626060 x>)) -1 (nil)
(nil))
(insn 12 11 13 (set (reg:HI 72)
(const_int 2 [0x2])) -1 (nil)
(nil))
(insn 13 12 14 (set (reg:DI 74)
(mem/s:DI (and:DI (plus:DI (reg/f:DI 71)
(const_int 6 [0x6]))
(const_int -8 [0xfffffffffffffff8])) [0 S8 A64])) -1 (nil)
(nil))
(insn 14 13 15 (set (reg:DI 73)
(plus:DI (plus:DI (reg/f:DI 71)
(const_int 6 [0x6]))
(const_int 1 [0x1]))) -1 (nil)
(nil))
(insn 15 14 16 (set (reg:DI 74)
(and:DI (not:DI (ashift:DI (const_int 65535 [0xffff])
(minus:DI (const_int 56 [0x38])
(ashift:DI (reg:DI 73)
(const_int 3 [0x3])))))
(reg:DI 74))) -1 (nil)
(nil))
(insn 16 15 17 (set (reg:DI 75)
(ashift:DI (zero_extend:DI (reg:HI 72))
(minus:DI (const_int 56 [0x38])
(ashift:DI (reg:DI 73)
(const_int 3 [0x3]))))) -1 (nil)
(nil))
(insn 17 16 18 (set (reg:DI 75)
(ior:DI (reg:DI 75)
(reg:DI 74))) -1 (nil)
(nil))
(insn 18 17 19 (set (mem:DI (and:DI (plus:DI (reg/f:DI 71)
(const_int 6 [0x6]))
(const_int -8 [0xfffffffffffffff8])) [0 S8 A64])
(reg:DI 75)) -1 (nil)
(nil))
(note 19 18 20 40007161440 NOTE_INSN_BLOCK_END)
(note 20 19 24 NOTE_INSN_FUNCTION_END)
(insn 24 20 25 (clobber (reg/i:DI 0 $0)) -1 (nil)
(nil))
(insn 25 24 22 (clobber (reg:DI 69 [ <result> ])) -1 (nil)
(nil))
(code_label 22 25 23 1 "" [0 uses])
(insn 23 22 26 (set (reg/i:DI 0 $0)
(reg:DI 69 [ <result> ])) -1 (nil)
(nil))
(insn 26 23 0 (use (reg/i:DI 0 $0)) -1 (nil)
(nil))
--
Summary: Unaligned access to HI values causes unrecognizable insn
error
Product: gcc
Version: 3.4.5
Status: UNCONFIRMED
Severity: critical
Priority: P2
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: nenad at intrepid dot com
CC: gcc-bugs at gcc dot gnu dot org
GCC build triplet: alphaev5-cray-unicosmk2.0.6.X
GCC host triplet: alphaev5-cray-unicosmk2.0.6.X
GCC target triplet: alphaev5-cray-unicosmk2.0.6.X
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22093
