[Bug rtl-optimization/19680] sub-optimial register allocation with sse

Tue, 01 Feb 2005 16:31:16 -0800 

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2005-02-02 
00:31 -------
Subject: Bug 19680

CVSROOT:        /cvs/gcc
Module name:    gcc
Changes by:     [EMAIL PROTECTED]       2005-02-02 00:30:38

Modified files:
        gcc            : ChangeLog 
        gcc/config/i386: i386-protos.h i386.c i386.h 

Log message:
        PR target/19680
        * config/i386/i386.h (MODES_TIEABLE_P): Use ix86_modes_tieable_p.
        * config/i386/i386.c (ix86_hard_regno_mode_ok): Change return
        type to bool.
        (ix86_tieable_integer_mode_p, ix86_modes_tieable_p): New.
        * config/i386/i386-protos.h: Update.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.7369&r2=2.7370
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/i386/i386-protos.h.diff?cvsroot=gcc&r1=1.130&r2=1.131
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/i386/i386.c.diff?cvsroot=gcc&r1=1.794&r2=1.795
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/i386/i386.h.diff?cvsroot=gcc&r1=1.420&r2=1.421



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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19680

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