On 2024/11/29 21:44, Dmitry Baryshkov wrote:
On Fri, 29 Nov 2024 at 11:51, Yongxing Mou <[email protected]> wrote:
On 2024/11/27 21:56, Dmitry Baryshkov wrote:
On Wed, Nov 27, 2024 at 03:05:02PM +0800, Yongxing Mou wrote:
Document the DPU for Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou <[email protected]>
---
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
index
01cf79bd754b491349c52c5aef49ba06e835d0bf..631181df2bcf2752679be4de0dee74e15e2c66c2
100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
@@ -14,6 +14,7 @@ $ref: /schemas/display/msm/dpu-common.yaml#
properties:
compatible:
enum:
+ - qcom,qcs8300-dpu
The DPU is the same as the one on SA8775P. Drop it completely.
Thanks,got it.The DPU of qcs8300 and sa8775p are exactly the same, but
sa8775p has two DPUs, while qcs8300 has only one DPU and has removed
intf2, intf4, and intf8. That's their difference.Can qcs8300 reuse
sa8775p's dpu driver? if we can reuse it,will drop this patch.
Are INTF_n blocks implemented in silicon or not? What happens if one
reads one of INTF_2 or INTF_4 registers?
If they are actually RAZ or cause data aborts, you can not reuse
SA8775P catalog entry. Please add corresponding data structures to
dpu_8_4_sa8775p.h.
Sorry for later reponse,i took some time to confirm the hardware
details.For QCS8300,DP1 CTRL/INTF_n is present in silicon.Only DP1 phy
is removed in silicon,it not available.so i think we can reuse the
sa8775p dpu.
- qcom,sa8775p-dpu
- qcom,sm8650-dpu
- qcom,x1e80100-dpu
--
2.34.1
