Signed-off-by: Jonathan Marek <[email protected]>
---
 arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
 arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 67d462715..e9a7bbce9 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -628,5 +628,22 @@
                                clock-names = "ipg", "ahb";
                        };
                };
+
+               gpu: gpu@30000000 {
+                       compatible = "amd,imageon-200.1", "amd,imageon";
+                       reg = <0x30000000 0x20000>;
+                       reg-names = "kgsl_3d0_reg_memory";
+                       interrupts = <12>;
+                       interrupt-names = "kgsl_3d0_irq";
+                       clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks 
IMX5_CLK_GARB_GATE>;
+                       clock-names = "core_clk", "mem_iface_clk";
+
+                       qcom,gpu-pwrlevels {
+                               compatible = "qcom,gpu-pwrlevels";
+                               qcom,gpu-pwrlevel@0 {
+                                       qcom,gpu-freq = <166250000>;
+                               };
+                       };
+               };
        };
 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 207eb557c..586d45586 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -838,5 +838,22 @@
                        reg = <0xf8000000 0x20000>;
                        clocks = <&clks IMX5_CLK_OCRAM>;
                };
+
+               gpu: gpu@30000000 {
+                       compatible = "amd,imageon-200.0", "amd,imageon";
+                       reg = <0x30000000 0x20000>;
+                       reg-names = "kgsl_3d0_reg_memory";
+                       interrupts = <12>;
+                       interrupt-names = "kgsl_3d0_irq";
+                       clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks 
IMX5_CLK_GARB_GATE>;
+                       clock-names = "core_clk", "mem_iface_clk";
+
+                       qcom,gpu-pwrlevels {
+                               compatible = "qcom,gpu-pwrlevels";
+                               qcom,gpu-pwrlevel@0 {
+                                       qcom,gpu-freq = <200000000>;
+                               };
+                       };
+               };
        };
 };
-- 
2.17.1

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