If received an interrupt while in protected-mode and paging enabled, is linear address from IDT stored at the idtr translated using the paging-hierarchy structures? I have looked at the interrupt/exception chapter in the corresponding Intel manual but can't find the answer. Maybe I overlooked. Thanks. _______________________________________________ [email protected] mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "[email protected]"
- Quick i386 question... Sergio Andrés Gómez del Real
- Re: Quick i386 question... John Baldwin
- Re: Quick i386 question... Sergio Andrés Gómez del Real
- Re: Quick i386 question... Sergio Andrés Gómez del Real
