I tested this on my T-bird athlon 800, and this is the result:

Testing PAUSE instruction:
Register esp changed: 0xbfbffb38 -> 0xbfbffafc

So I guess there's no problem.

Ken

On Fri, 24 May 2002, John Baldwin wrote:

> Hey gang, although Intel's document seems to claim that they tested
> proper operation of pause I'd like people with non-Intel processors
> to verify that it actually works.  Please compile the attached test
> program and run it.  The output should look like this:
>
> > ./pt
> Testing PAUSE instruction:
> Register esp changed: 0xbfbff9fc -> 0xbfbff9c0
>
> If you get a signal or any of the other registers change their value,
> please let me know.  I've tested this on a Pentium III mobile, a K6-II,
> and an Athlon.  The program cmopiles ok on both stable and current.
>
> -----FW: <[EMAIL PROTECTED]>-----
>
> Date: Tue, 21 May 2002 15:26:36 -0700 (PDT)
> Sender: [EMAIL PROTECTED]
> From: John Baldwin <[EMAIL PROTECTED]>
> To: [EMAIL PROTECTED], [EMAIL PROTECTED]
> Subject: cvs commit: src/sys/kern kern_mutex.c
>
> jhb         2002/05/21 15:26:36 PDT
>
>   Modified files:
>     sys/kern             kern_mutex.c
>   Log:
>   Add appropriate IA32 "pause" instructions to improve performanec on
>   Pentium 4's and newer IA32 processors.  The "pause" instruction has been
>   verified by Intel to be a NOP on all currently existing IA32 processors
>   prior to the Pentium 4.
>
>   Revision  Changes    Path
>   1.95      +17 -1     src/sys/kern/kern_mutex.c
>
> --------------End of forwarded message-------------------------
>
> --
>
> John Baldwin <[EMAIL PROTECTED]>  <><  http://www.FreeBSD.org/~jhb/
> "Power Users Use the Power to Serve!"  -  http://www.FreeBSD.org/
>


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