:In the long term, we probably need an spl-aware simplelock or maybe the
:cunning no-cost interrupt thread scheme which BSDi are using.
:
:--
:Doug Rabson Mail: [EMAIL PROTECTED]
:Nonlinear Systems Ltd. Phone: +44 181 442 9037
I really like the idea of a cunning no-cost interrupt thread scheme,
I didn't realize that BSDi had moved to it!
Doing this would allow us to remove easily half the spl management
code and would allow us to fix simplelocks - to implement them the way
they ought to be implemented.
--
On a related topic, I've done some syscall overhead measurements w/
SMP verses non-SMP systems that people may be interested in. The
SMP/patched version includes a patch that Alan is going to commit
soon ( a relatively simple removal of unnecessary locks surrounding
an already-atomic assembly operation ). The cpu's are P-III/450's.
no SMP Null syscall: 3532 nanoseconds
SMP Null syscall: 6750 nanoseconds
SMP/patched Null syscall: 6533 nanoseconds
In comparison, I believe the Linux syscall overhead is on the order
of 1 uS. Not that I am concerned about a few measily microseconds,
but this does show that we have a ways to go in our SMP work. There
is a lot of potential for improvement.
-Matt
Matthew Dillon
<[EMAIL PROTECTED]>
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