On Tue, Nov 16, 2021 at 08:51:03AM +0100, Thomas Koenig wrote:
> If you could start working on the points above, that would be great.

Just small completely untested step, which IMHO should ensure that
on powerpc64le-*linux* (unless --with-long-double-64 configured)
we build libgfortran by default with -mabi=ibmlongdouble (so that
code using GFC_REAL_16 can use long double etc. and the kind 16 in
filenames stands for IBM long double), but the *_r17.F90 and *_c17.F90
files are built with -mabi=ieeelongdouble (for Fortran we need to choose
either one or another one but not both).  *_r17*.c and *_c17*.c can be
compiled with -mabi=ibmlongdouble because in C we can use __float128
(or __ieee128) or KF/KC mode to make it work with both kind 16 and "17"
in the same TU.
I bet the next step will be try to generate the generated m4 files
in maintainer mode and start fixing what needs to be fixed.
E.g. make sure that for the REAL_17/COMPLEX_17 cases we actually emit the
libquadmath functions or __*ieee128 functions depending on whether glibc
has support or not when using libm functions, I think there are some sources
that read kind from function descriptors and that would be probably 16
rather than 17 even for the IEEE long double, etc.
But that is as far as I can spend time on this right now.

--- libgfortran/configure.ac.jj 2021-09-23 10:07:16.011181551 +0200
+++ libgfortran/configure.ac    2021-11-19 15:07:29.505962930 +0100
@@ -145,6 +145,7 @@ AC_SUBST(CFLAGS)
 AM_PROG_CC_C_O
 
 # Add -Wall -fno-repack-arrays -fno-underscoring if we are using GCC.
+have_real_17=no
 if test "x$GCC" = "xyes"; then
   AM_FCFLAGS="-I . -Wall -Werror -fimplicit-none -fno-repack-arrays 
-fno-underscoring"
   ## We like to use C11 and C99 routines when available.  This makes
@@ -154,8 +155,24 @@ if test "x$GCC" = "xyes"; then
   ## Compile the following tests with the same system header contents
   ## that we'll encounter when compiling our own source files.
   CFLAGS="-std=gnu11 $CFLAGS"
-fi
 
+  case x$target in
+    powerpc64le*-linux*)
+      AC_PREPROC_IFELSE(
+        [AC_LANG_PROGRAM([[#if __SIZEOF_LONG_DOUBLE__ != 16
+                          #error long double is double
+                          #endif]],
+                         [[(void) 0;]])],
+        [AM_FCFLAGS="$AM_FCFLAGS -mabi=ibmlongdouble";
+        AM_CFLAGS="$AM_CFLAGS -mabi=ibmlongdouble";
+        CFLAGS="$CFLAGS -mabi=ibmlongdouble";
+        have_real_17=yes])
+      ;;
+    *)
+      ;;
+  esac
+fi
+AM_CONDITIONAL([HAVE_REAL_17], [test "x$have_real_17" != xno])
 # Add CET specific flags if CET is enabled
 GCC_CET_FLAGS(CET_FLAGS)
 AM_FCFLAGS="$AM_FCFLAGS $CET_FLAGS"
@@ -665,10 +682,10 @@ LIBGFOR_CHECK_CRLF
 # Check whether we support AVX extensions
 LIBGFOR_CHECK_AVX
 
-# Check wether we support AVX2 extensions
+# Check whether we support AVX2 extensions
 LIBGFOR_CHECK_AVX2
 
-# Check wether we support AVX512f extensions
+# Check whether we support AVX512f extensions
 LIBGFOR_CHECK_AVX512F
 
 # Check for FMA3 extensions
--- libgfortran/kinds-override.h.jj     2021-01-04 10:25:54.764053433 +0100
+++ libgfortran/kinds-override.h        2021-11-19 14:28:05.799401414 +0100
@@ -44,3 +44,17 @@ see the files COPYING3 and COPYING.RUNTI
 # endif
 #endif
 
+#if defined(__powerpc64__) \
+    && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ \
+    && __SIZEOF_LONG_DOUBLE__ == 16 \
+    && defined(GFC_REAL_16_IS_LONG_DOUBLE)
+typedef __float128 GFC_REAL_17;
+typedef _Complex float __attribute__((mode(KC))) GFC_COMPLEX_17;
+#define HAVE_GFC_REAL_17
+#define HAVE_GFC_COMPLEX_17
+#define GFC_REAL_17_HUGE 1.18973149535723176508575932662800702e4932q
+#define GFC_REAL_17_LITERAL_SUFFIX q
+#define GFC_REAL_17_LITERAL(X) (X ## q)
+#define GFC_REAL_17_DIGITS 113
+#define GFC_REAL_17_RADIX 2
+#endif
--- libgfortran/Makefile.am.jj  2021-09-08 09:55:29.002718817 +0200
+++ libgfortran/Makefile.am     2021-11-19 15:08:01.634506758 +0100
@@ -241,7 +241,8 @@ i_bessel_c= \
 $(srcdir)/generated/bessel_r4.c \
 $(srcdir)/generated/bessel_r8.c \
 $(srcdir)/generated/bessel_r10.c \
-$(srcdir)/generated/bessel_r16.c
+$(srcdir)/generated/bessel_r16.c \
+$(srcdir)/generated/bessel_r17.c
 
 i_count_c= \
 $(srcdir)/generated/count_1_l.c \
@@ -281,10 +282,12 @@ $(srcdir)/generated/findloc0_r4.c \
 $(srcdir)/generated/findloc0_r8.c \
 $(srcdir)/generated/findloc0_r10.c \
 $(srcdir)/generated/findloc0_r16.c \
+$(srcdir)/generated/findloc0_r17.c \
 $(srcdir)/generated/findloc0_c4.c \
 $(srcdir)/generated/findloc0_c8.c \
 $(srcdir)/generated/findloc0_c10.c \
-$(srcdir)/generated/findloc0_c16.c
+$(srcdir)/generated/findloc0_c16.c \
+$(srcdir)/generated/findloc0_c17.c
 
 i_findloc0s_c= \
 $(srcdir)/generated/findloc0_s1.c \
@@ -300,10 +303,12 @@ $(srcdir)/generated/findloc1_r4.c \
 $(srcdir)/generated/findloc1_r8.c \
 $(srcdir)/generated/findloc1_r10.c \
 $(srcdir)/generated/findloc1_r16.c \
+$(srcdir)/generated/findloc1_r17.c \
 $(srcdir)/generated/findloc1_c4.c \
 $(srcdir)/generated/findloc1_c8.c \
 $(srcdir)/generated/findloc1_c10.c \
-$(srcdir)/generated/findloc1_c16.c
+$(srcdir)/generated/findloc1_c16.c \
+$(srcdir)/generated/findloc1_c17.c
 
 i_findloc1s_c= \
 $(srcdir)/generated/findloc1_s1.c \
@@ -340,7 +345,10 @@ $(srcdir)/generated/maxloc0_8_r10.c \
 $(srcdir)/generated/maxloc0_16_r10.c \
 $(srcdir)/generated/maxloc0_4_r16.c \
 $(srcdir)/generated/maxloc0_8_r16.c \
-$(srcdir)/generated/maxloc0_16_r16.c
+$(srcdir)/generated/maxloc0_16_r16.c \
+$(srcdir)/generated/maxloc0_4_r17.c \
+$(srcdir)/generated/maxloc0_8_r17.c \
+$(srcdir)/generated/maxloc0_16_r17.c
 
 i_maxloc0s_c = \
 $(srcdir)/generated/maxloc0_4_s1.c \
@@ -375,9 +383,12 @@ $(srcdir)/generated/maxloc1_16_r8.c \
 $(srcdir)/generated/maxloc1_4_r10.c \
 $(srcdir)/generated/maxloc1_8_r10.c \
 $(srcdir)/generated/maxloc1_16_r10.c \
-$(srcdir)/generated/maxloc1_4_r16.c \
+$(srcdir)/generated/maxloc1_4_r17.c \
 $(srcdir)/generated/maxloc1_8_r16.c \
-$(srcdir)/generated/maxloc1_16_r16.c
+$(srcdir)/generated/maxloc1_16_r16.c \
+$(srcdir)/generated/maxloc1_4_r17.c \
+$(srcdir)/generated/maxloc1_8_r17.c \
+$(srcdir)/generated/maxloc1_16_r17.c
 
 i_maxloc1s_c= \
 $(srcdir)/generated/maxloc1_4_s1.c \
@@ -404,7 +415,8 @@ $(srcdir)/generated/maxval_i16.c \
 $(srcdir)/generated/maxval_r4.c \
 $(srcdir)/generated/maxval_r8.c \
 $(srcdir)/generated/maxval_r10.c \
-$(srcdir)/generated/maxval_r16.c
+$(srcdir)/generated/maxval_r16.c \
+$(srcdir)/generated/maxval_r17.c
 
 i_maxval0s_c=\
 $(srcdir)/generated/maxval0_s1.c \
@@ -441,7 +453,10 @@ $(srcdir)/generated/minloc0_8_r10.c \
 $(srcdir)/generated/minloc0_16_r10.c \
 $(srcdir)/generated/minloc0_4_r16.c \
 $(srcdir)/generated/minloc0_8_r16.c \
-$(srcdir)/generated/minloc0_16_r16.c
+$(srcdir)/generated/minloc0_16_r16.c \
+$(srcdir)/generated/minloc0_4_r17.c \
+$(srcdir)/generated/minloc0_8_r17.c \
+$(srcdir)/generated/minloc0_16_r17.c
 
 i_minloc0s_c = \
 $(srcdir)/generated/minloc0_4_s1.c \
@@ -478,7 +493,10 @@ $(srcdir)/generated/minloc1_8_r10.c \
 $(srcdir)/generated/minloc1_16_r10.c \
 $(srcdir)/generated/minloc1_4_r16.c \
 $(srcdir)/generated/minloc1_8_r16.c \
-$(srcdir)/generated/minloc1_16_r16.c
+$(srcdir)/generated/minloc1_16_r16.c \
+$(srcdir)/generated/minloc1_4_r17.c \
+$(srcdir)/generated/minloc1_8_r17.c \
+$(srcdir)/generated/minloc1_16_r17.c
 
 i_minloc1s_c= \
 $(srcdir)/generated/minloc1_4_s1.c \
@@ -505,7 +523,8 @@ $(srcdir)/generated/minval_i16.c \
 $(srcdir)/generated/minval_r4.c \
 $(srcdir)/generated/minval_r8.c \
 $(srcdir)/generated/minval_r10.c \
-$(srcdir)/generated/minval_r16.c
+$(srcdir)/generated/minval_r16.c \
+$(srcdir)/generated/minval_r17.c
 
 i_minval0s_c=\
 $(srcdir)/generated/minval0_s1.c \
@@ -519,7 +538,8 @@ i_norm2_c= \
 $(srcdir)/generated/norm2_r4.c \
 $(srcdir)/generated/norm2_r8.c \
 $(srcdir)/generated/norm2_r10.c \
-$(srcdir)/generated/norm2_r16.c
+$(srcdir)/generated/norm2_r16.c \
+$(srcdir)/generated/norm2_r17.c
 
 i_parity_c = \
 $(srcdir)/generated/parity_l1.c \
@@ -538,10 +558,12 @@ $(srcdir)/generated/sum_r4.c \
 $(srcdir)/generated/sum_r8.c \
 $(srcdir)/generated/sum_r10.c \
 $(srcdir)/generated/sum_r16.c \
+$(srcdir)/generated/sum_r17.c \
 $(srcdir)/generated/sum_c4.c \
 $(srcdir)/generated/sum_c8.c \
 $(srcdir)/generated/sum_c10.c \
-$(srcdir)/generated/sum_c16.c
+$(srcdir)/generated/sum_c16.c \
+$(srcdir)/generated/sum_c17.c
 
 i_product_c= \
 $(srcdir)/generated/product_i1.c \
@@ -553,10 +575,12 @@ $(srcdir)/generated/product_r4.c \
 $(srcdir)/generated/product_r8.c \
 $(srcdir)/generated/product_r10.c \
 $(srcdir)/generated/product_r16.c \
+$(srcdir)/generated/product_r17.c \
 $(srcdir)/generated/product_c4.c \
 $(srcdir)/generated/product_c8.c \
 $(srcdir)/generated/product_c10.c \
-$(srcdir)/generated/product_c16.c
+$(srcdir)/generated/product_c16.c \
+$(srcdir)/generated/product_c17.c
 
 i_matmul_c= \
 $(srcdir)/generated/matmul_i1.c \
@@ -568,10 +592,12 @@ $(srcdir)/generated/matmul_r4.c \
 $(srcdir)/generated/matmul_r8.c \
 $(srcdir)/generated/matmul_r10.c \
 $(srcdir)/generated/matmul_r16.c \
+$(srcdir)/generated/matmul_r17.c \
 $(srcdir)/generated/matmul_c4.c \
 $(srcdir)/generated/matmul_c8.c \
 $(srcdir)/generated/matmul_c10.c \
-$(srcdir)/generated/matmul_c16.c
+$(srcdir)/generated/matmul_c16.c \
+$(srcdir)/generated/matmul_c17.c
 
 i_matmulavx128_c= \
 $(srcdir)/generated/matmulavx128_i1.c \
@@ -583,10 +609,12 @@ $(srcdir)/generated/matmulavx128_r4.c \
 $(srcdir)/generated/matmulavx128_r8.c \
 $(srcdir)/generated/matmulavx128_r10.c \
 $(srcdir)/generated/matmulavx128_r16.c \
+$(srcdir)/generated/matmulavx128_r17.c \
 $(srcdir)/generated/matmulavx128_c4.c \
 $(srcdir)/generated/matmulavx128_c8.c \
 $(srcdir)/generated/matmulavx128_c10.c \
-$(srcdir)/generated/matmulavx128_c16.c
+$(srcdir)/generated/matmulavx128_c16.c \
+$(srcdir)/generated/matmulavx128_c17.c;
 
 i_matmull_c= \
 $(srcdir)/generated/matmul_l4.c \
@@ -608,10 +636,12 @@ $(srcdir)/generated/reshape_r4.c \
 $(srcdir)/generated/reshape_r8.c \
 $(srcdir)/generated/reshape_r10.c \
 $(srcdir)/generated/reshape_r16.c \
+$(srcdir)/generated/reshape_r17.c \
 $(srcdir)/generated/reshape_c4.c \
 $(srcdir)/generated/reshape_c8.c \
 $(srcdir)/generated/reshape_c10.c \
-$(srcdir)/generated/reshape_c16.c
+$(srcdir)/generated/reshape_c16.c \
+$(srcdir)/generated/reshape_c17.c
 
 i_eoshift1_c= \
 $(srcdir)/generated/eoshift1_4.c \
@@ -633,10 +663,12 @@ $(srcdir)/generated/cshift0_r4.c \
 $(srcdir)/generated/cshift0_r8.c \
 $(srcdir)/generated/cshift0_r10.c \
 $(srcdir)/generated/cshift0_r16.c \
+$(srcdir)/generated/cshift0_r17.c \
 $(srcdir)/generated/cshift0_c4.c \
 $(srcdir)/generated/cshift0_c8.c \
 $(srcdir)/generated/cshift0_c10.c \
-$(srcdir)/generated/cshift0_c16.c
+$(srcdir)/generated/cshift0_c16.c \
+$(srcdir)/generated/cshift0_c17.c
 
 i_cshift1_c= \
 $(srcdir)/generated/cshift1_4.c \
@@ -653,10 +685,12 @@ $(srcdir)/generated/cshift1_4_r4.c \
 $(srcdir)/generated/cshift1_4_r8.c \
 $(srcdir)/generated/cshift1_4_r10.c \
 $(srcdir)/generated/cshift1_4_r16.c \
+$(srcdir)/generated/cshift1_4_r17.c \
 $(srcdir)/generated/cshift1_4_c4.c \
 $(srcdir)/generated/cshift1_4_c8.c \
 $(srcdir)/generated/cshift1_4_c10.c \
 $(srcdir)/generated/cshift1_4_c16.c \
+$(srcdir)/generated/cshift1_4_c17.c \
 $(srcdir)/generated/cshift1_8_i1.c \
 $(srcdir)/generated/cshift1_8_i2.c \
 $(srcdir)/generated/cshift1_8_i4.c \
@@ -666,10 +700,12 @@ $(srcdir)/generated/cshift1_8_r4.c \
 $(srcdir)/generated/cshift1_8_r8.c \
 $(srcdir)/generated/cshift1_8_r10.c \
 $(srcdir)/generated/cshift1_8_r16.c \
+$(srcdir)/generated/cshift1_8_r17.c \
 $(srcdir)/generated/cshift1_8_c4.c \
 $(srcdir)/generated/cshift1_8_c8.c \
 $(srcdir)/generated/cshift1_8_c10.c \
 $(srcdir)/generated/cshift1_8_c16.c \
+$(srcdir)/generated/cshift1_8_c17.c \
 $(srcdir)/generated/cshift1_16_i1.c \
 $(srcdir)/generated/cshift1_16_i2.c \
 $(srcdir)/generated/cshift1_16_i4.c \
@@ -679,10 +715,12 @@ $(srcdir)/generated/cshift1_16_r4.c \
 $(srcdir)/generated/cshift1_16_r8.c \
 $(srcdir)/generated/cshift1_16_r10.c \
 $(srcdir)/generated/cshift1_16_r16.c \
+$(srcdir)/generated/cshift1_16_r17.c \
 $(srcdir)/generated/cshift1_16_c4.c \
 $(srcdir)/generated/cshift1_16_c8.c \
 $(srcdir)/generated/cshift1_16_c10.c \
-$(srcdir)/generated/cshift1_16_c16.c
+$(srcdir)/generated/cshift1_16_c16.c \
+$(srcdir)/generated/cshift1_16_c17.c
 
 in_pack_c = \
 $(srcdir)/generated/in_pack_i1.c \
@@ -694,10 +732,12 @@ $(srcdir)/generated/in_pack_r4.c \
 $(srcdir)/generated/in_pack_r8.c \
 $(srcdir)/generated/in_pack_r10.c \
 $(srcdir)/generated/in_pack_r16.c \
+$(srcdir)/generated/in_pack_r17.c \
 $(srcdir)/generated/in_pack_c4.c \
 $(srcdir)/generated/in_pack_c8.c \
 $(srcdir)/generated/in_pack_c10.c \
-$(srcdir)/generated/in_pack_c16.c
+$(srcdir)/generated/in_pack_c16.c \
+$(srcdir)/generated/in_pack_c17.c
 
 in_unpack_c = \
 $(srcdir)/generated/in_unpack_i1.c \
@@ -709,20 +749,24 @@ $(srcdir)/generated/in_unpack_r4.c \
 $(srcdir)/generated/in_unpack_r8.c \
 $(srcdir)/generated/in_unpack_r10.c \
 $(srcdir)/generated/in_unpack_r16.c \
+$(srcdir)/generated/in_unpack_r17.c \
 $(srcdir)/generated/in_unpack_c4.c \
 $(srcdir)/generated/in_unpack_c8.c \
 $(srcdir)/generated/in_unpack_c10.c \
-$(srcdir)/generated/in_unpack_c16.c
+$(srcdir)/generated/in_unpack_c16.c \
+$(srcdir)/generated/in_unpack_c17.c
 
 i_pow_c = \
 $(srcdir)/generated/pow_i4_i4.c \
 $(srcdir)/generated/pow_i8_i4.c \
 $(srcdir)/generated/pow_i16_i4.c \
 $(srcdir)/generated/pow_r16_i4.c \
+$(srcdir)/generated/pow_r17_i4.c \
 $(srcdir)/generated/pow_c4_i4.c \
 $(srcdir)/generated/pow_c8_i4.c \
 $(srcdir)/generated/pow_c10_i4.c \
 $(srcdir)/generated/pow_c16_i4.c \
+$(srcdir)/generated/pow_c17_i4.c \
 $(srcdir)/generated/pow_i4_i8.c \
 $(srcdir)/generated/pow_i8_i8.c \
 $(srcdir)/generated/pow_i16_i8.c \
@@ -730,10 +774,12 @@ $(srcdir)/generated/pow_r4_i8.c \
 $(srcdir)/generated/pow_r8_i8.c \
 $(srcdir)/generated/pow_r10_i8.c \
 $(srcdir)/generated/pow_r16_i8.c \
+$(srcdir)/generated/pow_r17_i8.c \
 $(srcdir)/generated/pow_c4_i8.c \
 $(srcdir)/generated/pow_c8_i8.c \
 $(srcdir)/generated/pow_c10_i8.c \
 $(srcdir)/generated/pow_c16_i8.c \
+$(srcdir)/generated/pow_c17_i8.c \
 $(srcdir)/generated/pow_i4_i16.c \
 $(srcdir)/generated/pow_i8_i16.c \
 $(srcdir)/generated/pow_i16_i16.c \
@@ -741,10 +787,12 @@ $(srcdir)/generated/pow_r4_i16.c \
 $(srcdir)/generated/pow_r8_i16.c \
 $(srcdir)/generated/pow_r10_i16.c \
 $(srcdir)/generated/pow_r16_i16.c \
+$(srcdir)/generated/pow_r17_i16.c \
 $(srcdir)/generated/pow_c4_i16.c \
 $(srcdir)/generated/pow_c8_i16.c \
 $(srcdir)/generated/pow_c10_i16.c \
-$(srcdir)/generated/pow_c16_i16.c
+$(srcdir)/generated/pow_c16_i16.c \
+$(srcdir)/generated/pow_c17_i16.c
 
 i_pack_c = \
 $(srcdir)/generated/pack_i1.c \
@@ -756,10 +804,12 @@ $(srcdir)/generated/pack_r4.c \
 $(srcdir)/generated/pack_r8.c \
 $(srcdir)/generated/pack_r10.c \
 $(srcdir)/generated/pack_r16.c \
+$(srcdir)/generated/pack_r17.c \
 $(srcdir)/generated/pack_c4.c \
 $(srcdir)/generated/pack_c8.c \
 $(srcdir)/generated/pack_c10.c \
-$(srcdir)/generated/pack_c16.c
+$(srcdir)/generated/pack_c16.c \
+$(srcdir)/generated/pack_c17.c
 
 i_unpack_c = \
 $(srcdir)/generated/unpack_i1.c \
@@ -771,10 +821,12 @@ $(srcdir)/generated/unpack_r4.c \
 $(srcdir)/generated/unpack_r8.c \
 $(srcdir)/generated/unpack_r10.c \
 $(srcdir)/generated/unpack_r16.c \
+$(srcdir)/generated/unpack_r17.c \
 $(srcdir)/generated/unpack_c4.c \
 $(srcdir)/generated/unpack_c8.c \
 $(srcdir)/generated/unpack_c10.c \
-$(srcdir)/generated/unpack_c16.c
+$(srcdir)/generated/unpack_c16.c \
+$(srcdir)/generated/unpack_c17.c
 
 i_spread_c = \
 $(srcdir)/generated/spread_i1.c \
@@ -786,10 +838,12 @@ $(srcdir)/generated/spread_r4.c \
 $(srcdir)/generated/spread_r8.c \
 $(srcdir)/generated/spread_r10.c \
 $(srcdir)/generated/spread_r16.c \
+$(srcdir)/generated/spread_r17.c \
 $(srcdir)/generated/spread_c4.c \
 $(srcdir)/generated/spread_c8.c \
 $(srcdir)/generated/spread_c10.c \
-$(srcdir)/generated/spread_c16.c 
+$(srcdir)/generated/spread_c16.c \
+$(srcdir)/generated/spread_c17.c 
 
 i_isobinding_c = \
 $(srcdir)/runtime/ISO_Fortran_binding.c
@@ -830,6 +884,7 @@ $(srcdir)/generated/_abs_c4.F90 \
 $(srcdir)/generated/_abs_c8.F90 \
 $(srcdir)/generated/_abs_c10.F90 \
 $(srcdir)/generated/_abs_c16.F90 \
+$(srcdir)/generated/_abs_c17.F90 \
 $(srcdir)/generated/_abs_i4.F90 \
 $(srcdir)/generated/_abs_i8.F90 \
 $(srcdir)/generated/_abs_i16.F90 \
@@ -837,106 +892,132 @@ $(srcdir)/generated/_abs_r4.F90 \
 $(srcdir)/generated/_abs_r8.F90 \
 $(srcdir)/generated/_abs_r10.F90 \
 $(srcdir)/generated/_abs_r16.F90 \
+$(srcdir)/generated/_abs_r17.F90 \
 $(srcdir)/generated/_aimag_c4.F90 \
 $(srcdir)/generated/_aimag_c8.F90 \
 $(srcdir)/generated/_aimag_c10.F90 \
 $(srcdir)/generated/_aimag_c16.F90 \
+$(srcdir)/generated/_aimag_c17.F90 \
 $(srcdir)/generated/_exp_r4.F90 \
 $(srcdir)/generated/_exp_r8.F90 \
 $(srcdir)/generated/_exp_r10.F90 \
 $(srcdir)/generated/_exp_r16.F90 \
+$(srcdir)/generated/_exp_r17.F90 \
 $(srcdir)/generated/_exp_c4.F90 \
 $(srcdir)/generated/_exp_c8.F90 \
 $(srcdir)/generated/_exp_c10.F90 \
 $(srcdir)/generated/_exp_c16.F90 \
+$(srcdir)/generated/_exp_c17.F90 \
 $(srcdir)/generated/_log_r4.F90 \
 $(srcdir)/generated/_log_r8.F90 \
 $(srcdir)/generated/_log_r10.F90 \
 $(srcdir)/generated/_log_r16.F90 \
+$(srcdir)/generated/_log_r17.F90 \
 $(srcdir)/generated/_log_c4.F90 \
 $(srcdir)/generated/_log_c8.F90 \
 $(srcdir)/generated/_log_c10.F90 \
 $(srcdir)/generated/_log_c16.F90 \
+$(srcdir)/generated/_log_c17.F90 \
 $(srcdir)/generated/_log10_r4.F90 \
 $(srcdir)/generated/_log10_r8.F90 \
 $(srcdir)/generated/_log10_r10.F90 \
 $(srcdir)/generated/_log10_r16.F90 \
+$(srcdir)/generated/_log10_r17.F90 \
 $(srcdir)/generated/_sqrt_r4.F90 \
 $(srcdir)/generated/_sqrt_r8.F90 \
 $(srcdir)/generated/_sqrt_r10.F90 \
 $(srcdir)/generated/_sqrt_r16.F90 \
+$(srcdir)/generated/_sqrt_r17.F90 \
 $(srcdir)/generated/_sqrt_c4.F90 \
 $(srcdir)/generated/_sqrt_c8.F90 \
 $(srcdir)/generated/_sqrt_c10.F90 \
 $(srcdir)/generated/_sqrt_c16.F90 \
+$(srcdir)/generated/_sqrt_c17.F90 \
 $(srcdir)/generated/_asin_r4.F90 \
 $(srcdir)/generated/_asin_r8.F90 \
 $(srcdir)/generated/_asin_r10.F90 \
 $(srcdir)/generated/_asin_r16.F90 \
+$(srcdir)/generated/_asin_r17.F90 \
 $(srcdir)/generated/_asinh_r4.F90 \
 $(srcdir)/generated/_asinh_r8.F90 \
 $(srcdir)/generated/_asinh_r10.F90 \
 $(srcdir)/generated/_asinh_r16.F90 \
+$(srcdir)/generated/_asinh_r17.F90 \
 $(srcdir)/generated/_acos_r4.F90 \
 $(srcdir)/generated/_acos_r8.F90 \
 $(srcdir)/generated/_acos_r10.F90 \
 $(srcdir)/generated/_acos_r16.F90 \
+$(srcdir)/generated/_acos_r17.F90 \
 $(srcdir)/generated/_acosh_r4.F90 \
 $(srcdir)/generated/_acosh_r8.F90 \
 $(srcdir)/generated/_acosh_r10.F90 \
 $(srcdir)/generated/_acosh_r16.F90 \
+$(srcdir)/generated/_acosh_r17.F90 \
 $(srcdir)/generated/_atan_r4.F90 \
 $(srcdir)/generated/_atan_r8.F90 \
 $(srcdir)/generated/_atan_r10.F90 \
 $(srcdir)/generated/_atan_r16.F90 \
+$(srcdir)/generated/_atan_r17.F90 \
 $(srcdir)/generated/_atanh_r4.F90 \
 $(srcdir)/generated/_atanh_r8.F90 \
 $(srcdir)/generated/_atanh_r10.F90 \
 $(srcdir)/generated/_atanh_r16.F90 \
+$(srcdir)/generated/_atanh_r17.F90 \
 $(srcdir)/generated/_sin_r4.F90 \
 $(srcdir)/generated/_sin_r8.F90 \
 $(srcdir)/generated/_sin_r10.F90 \
 $(srcdir)/generated/_sin_r16.F90 \
+$(srcdir)/generated/_sin_r17.F90 \
 $(srcdir)/generated/_sin_c4.F90 \
 $(srcdir)/generated/_sin_c8.F90 \
 $(srcdir)/generated/_sin_c10.F90 \
 $(srcdir)/generated/_sin_c16.F90 \
+$(srcdir)/generated/_sin_c17.F90 \
 $(srcdir)/generated/_cos_r4.F90 \
 $(srcdir)/generated/_cos_r8.F90 \
 $(srcdir)/generated/_cos_r10.F90 \
 $(srcdir)/generated/_cos_r16.F90 \
+$(srcdir)/generated/_cos_r17.F90 \
 $(srcdir)/generated/_cos_c4.F90 \
 $(srcdir)/generated/_cos_c8.F90 \
 $(srcdir)/generated/_cos_c10.F90 \
 $(srcdir)/generated/_cos_c16.F90 \
+$(srcdir)/generated/_cos_c17.F90 \
 $(srcdir)/generated/_tan_r4.F90 \
 $(srcdir)/generated/_tan_r8.F90 \
 $(srcdir)/generated/_tan_r10.F90 \
 $(srcdir)/generated/_tan_r16.F90 \
+$(srcdir)/generated/_tan_r17.F90 \
 $(srcdir)/generated/_sinh_r4.F90 \
 $(srcdir)/generated/_sinh_r8.F90 \
 $(srcdir)/generated/_sinh_r10.F90 \
 $(srcdir)/generated/_sinh_r16.F90 \
+$(srcdir)/generated/_sinh_r17.F90 \
 $(srcdir)/generated/_cosh_r4.F90 \
 $(srcdir)/generated/_cosh_r8.F90 \
 $(srcdir)/generated/_cosh_r10.F90 \
 $(srcdir)/generated/_cosh_r16.F90 \
+$(srcdir)/generated/_cosh_r17.F90 \
 $(srcdir)/generated/_tanh_r4.F90 \
 $(srcdir)/generated/_tanh_r8.F90 \
 $(srcdir)/generated/_tanh_r10.F90 \
 $(srcdir)/generated/_tanh_r16.F90 \
+$(srcdir)/generated/_tanh_r17.F90 \
 $(srcdir)/generated/_conjg_c4.F90 \
 $(srcdir)/generated/_conjg_c8.F90 \
 $(srcdir)/generated/_conjg_c10.F90 \
 $(srcdir)/generated/_conjg_c16.F90 \
+$(srcdir)/generated/_conjg_c17.F90 \
 $(srcdir)/generated/_aint_r4.F90 \
 $(srcdir)/generated/_aint_r8.F90 \
 $(srcdir)/generated/_aint_r10.F90 \
 $(srcdir)/generated/_aint_r16.F90 \
+$(srcdir)/generated/_aint_r17.F90 \
 $(srcdir)/generated/_anint_r4.F90 \
 $(srcdir)/generated/_anint_r8.F90 \
 $(srcdir)/generated/_anint_r10.F90 \
-$(srcdir)/generated/_anint_r16.F90
+$(srcdir)/generated/_anint_r16.F90 \
+$(srcdir)/generated/_anint_r17.F90
 
 gfor_built_specific2_src= \
 $(srcdir)/generated/_sign_i4.F90 \
@@ -946,6 +1027,7 @@ $(srcdir)/generated/_sign_r4.F90 \
 $(srcdir)/generated/_sign_r8.F90 \
 $(srcdir)/generated/_sign_r10.F90 \
 $(srcdir)/generated/_sign_r16.F90 \
+$(srcdir)/generated/_sign_r17.F90 \
 $(srcdir)/generated/_dim_i4.F90 \
 $(srcdir)/generated/_dim_i8.F90 \
 $(srcdir)/generated/_dim_i16.F90 \
@@ -953,17 +1035,20 @@ $(srcdir)/generated/_dim_r4.F90 \
 $(srcdir)/generated/_dim_r8.F90 \
 $(srcdir)/generated/_dim_r10.F90 \
 $(srcdir)/generated/_dim_r16.F90 \
+$(srcdir)/generated/_dim_r17.F90 \
 $(srcdir)/generated/_atan2_r4.F90 \
 $(srcdir)/generated/_atan2_r8.F90 \
 $(srcdir)/generated/_atan2_r10.F90 \
 $(srcdir)/generated/_atan2_r16.F90 \
+$(srcdir)/generated/_atan2_r17.F90 \
 $(srcdir)/generated/_mod_i4.F90 \
 $(srcdir)/generated/_mod_i8.F90 \
 $(srcdir)/generated/_mod_i16.F90 \
 $(srcdir)/generated/_mod_r4.F90 \
 $(srcdir)/generated/_mod_r8.F90 \
 $(srcdir)/generated/_mod_r10.F90 \
-$(srcdir)/generated/_mod_r16.F90
+$(srcdir)/generated/_mod_r16.F90 \
+$(srcdir)/generated/_mod_r17.F90
 
 gfor_misc_specifics = $(srcdir)/generated/misc_specifics.F90
 
@@ -989,6 +1074,11 @@ $(patsubst %.c,%.lo,$(notdir $(i_matmull
 $(patsubst %.F90,%.lo,$(patsubst %.f90,%.lo,$(notdir $(gfor_specific_src)))): 
AM_FCFLAGS += -fallow-leading-underscore
 selected_real_kind.lo selected_int_kind.lo: AM_FCFLAGS += 
-fallow-leading-underscore
 
+# Build *_r17.F90 and *_c17.F90 with additional -mabi=ieeelongdouble on 
powerpc64le-linux.
+if HAVE_REAL_17
+$(patsubst %.F90,%.lo,$(filter %_r17.F90 %_c17.F90 $(notdir 
$(gfor_specific_src)))): AM_FCFLAGS += -mabi=ieeelongdouble
+endif
+
 if IEEE_SUPPORT
 # Add flags for IEEE modules
 $(patsubst %.F90,%.lo,$(notdir $(gfor_ieee_src))): AM_FCFLAGS += 
-Wno-unused-dummy-argument -Wno-c-binding-type -ffree-line-length-0 
-fallow-leading-underscore


        Jakub

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