You seem to still be on the staging branch. We have moved development
to a master branch by now and abandoned staging. You should rebase
on master (where some changes regarding 4-byte addressing were merged).
OK, does this look better: flashrom p1.0-22-g0bfa819 on Linux
4.14.24-v7+ (armv7l)?
No, that looks like the same revision but with your local changes
removed. If you never checked out master before, this would do:
$ git fetch origin master
$ git checkout master
Not needed for the tests below, though.
You have to set at least FEATURE_4BA_NATIVE. The chip also supports an
extended address register and a 4BA mode with legacy instructions; but
the commands differ from what is already implemented for other chips. If
you don't want to look into it, I can provide a patch in case you would
agree to test it?
yes, please!
According to the datasheet the chip supports 4-byte addresses in three
ways. To test each of them I've added the features step-by-step [1,2,3].
Flashrom decides which way to use by the programmer's features. Your
linux_spi programmer should support all ways.
Please check out, build and test each commit individually with a write
of random data (new random data each time, otherwise flashrom would bail
out), e.g.
$ git fetch https://review.coreboot.org/flashrom refs/changes/32/25132/2
$ git checkout FETCH_HEAD
$ make
$ dd bs=1M count=32 if=/dev/urandom of=random1.rom
$ ./flashrom -p linux_spi... -w random.rom -o logfile1.txt
$ git fetch https://review.coreboot.org/flashrom refs/changes/33/25133/3
$ git checkout FETCH_HEAD
$ make
$ ...
$ git fetch https://review.coreboot.org/flashrom refs/changes/34/25134/3
$ git checkout FETCH_HEAD
$ make
$ ...
Nico
[1] https://review.coreboot.org/#/c/flashrom/+/25132/
[2] https://review.coreboot.org/#/c/flashrom/+/25133/
[3] https://review.coreboot.org/#/c/flashrom/+/25134/
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