On Tue, 23 Aug 2005 10:30:28 +0900 Carsten Haitzler (The Rasterman) <[EMAIL PROTECTED]> bubbled:
> On Mon, 22 Aug 2005 20:53:07 +0200 ilLogict <[EMAIL PROTECTED]> > babbled: > > > Hello! > > > > I always had the same problem on my box. But on amd64, this is set > > as gcc's default. Do anyone know how to bypass it so that it won't > > be used? > > man gcc. as for the sse fp math... it (from memory) makes gcc use the > sse instruction set to do floating point math operations. this is > likely a bad thing as it 1. means using the "mmx unit" and swapping > out of fp mode and thus you have a cycle hit with an emms coming back > in - as the fp ops are short and not all over this isn't much worth > it. i suspect there is some conversion rounding cumulative error. but > as i dont have an amd64 i cant tell you much more than what i suspect. > :) Maybe you can disable the option in the specs file?! -- MyExcuse: incompatible bit-registration operators Martin Zwickel <[EMAIL PROTECTED]> Research & Development TechnoTrend AG <http://www.technotrend.de>
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