The K2 is a careful balance between high performance, small size, low
current drain, and low cost, while at the same time using through-hole
parts to make it easy to build. As the principle designer of the rig, I
can tell you that this required a number of design tricks to
accomplish.
The "clunks" are a side-effect of one of these design choices. A little
background will help explain this. I'll also briefly describe what
could be done about it.
An all-band, downconversion superhet transceiver needs a wide tuning
range, and we accomplished this using a single-VCO synthesizer with
just three inexpensive relays to select capacitor ranges. (I still have
the spreadsheet that I sweated over for a couple of weeks, trying to
optimize the topology in order to cover all the ham bands.) To get fine
steps for the phase-locked loop, another trick was required: we used a
D-to-A converter driving varactor tuning diodes on the crystal
reference oscillator. The alternatives (such as a DDS reference or a
dual-loop design) didn't meet our signal purity, cost, current, or
other criteria.
The crystal oscillator (technically a temperature-compensated VCXO)
tunes a small range to preserve stability. This requires that we change
the PLL divider values every 5 kHz as you tune the VFO. All this is
done for you by the firmware, which includes an autocalibration
procedure involving a lot of even trickier firmware. K2 owners know it
as the "CAL PLL" menu entry. I know it as the thing that kept me up
until 4 AM on a couple of occasions, trying to get the critical part of
the algorithm to fit in available code space!
When you cross a 5-kHz boundary (which may actually occur at odd
frequencies, not even 5-kHz boundaries), the VCO is forced to "slew"
some distance in frequency as the PLL re-locks. We achieved an
excellent lock time with our synth design, but no matter how fast you
do this the synth can, for a few milliseconds, stray into territory
where there may be a strong signal -- say, up the band 10 or 15 kHz.
We experimented with muting the receiver at these boundaries, but that
creates a very annoying effect as you tune. So, based on hundreds of
hours of operation by field testers, we elected not to do the muting,
and live with the occasional boundary artifact.
It might be possible to remove the artifact using DSP. For example, if
the DSP knew that an artifact was imminent, it could briefly invoke a
shaped limiter in the audio channel. Under normal circumstances you
wouldn't notice the effect of this at all while tuning, even with
strong signals nearby. There are some edge conditions that would
require optimization of the DSP code (AGC interactions, etc.), but it
might be a good solution.
The other approach would be to make the reference oscillator for the
PLL tune over a much wider range. This would eliminate the need to
switch the PLL dividers so often, and it's the solution found in both
much more expensive radios and radios with much lower performance -- in
both cases, different design tradeoffs are possible. You can either
throw a lot of components at it, or you can live with awful DDS spurs.
Note that you could emulate the DSP solution using a carefully-designed
analog AF limiter (ahead of the LM380), triggered by the SPI bus chip
select to the PLL IC.
The rest is left as an exercise for the reader :)
73,
Wayne
N6KR
---
http://www.elecraft.com
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