Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 5e1db3b4a457d83e3ddace716a7e60e68f3ffb61
https://github.com/tianocore/edk2/commit/5e1db3b4a457d83e3ddace716a7e60e68f3ffb61
Author: Dongyan Qian <[email protected]>
Date: 2026-08-31 (Mon, 31 Aug 2026)
Changed paths:
M UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
Log Message:
-----------
UefiCpuPkg/LoongArch64: Keep no-read mappings valid
The LoongArch64 MMU code currently makes EFI_MEMORY_RP effective by
setting PAGE_NO_READ and then clearing PAGE_PRESENT and PAGE_VALID.
That is a conservative guard-page fallback, but it is stronger than
the architectural read-protect mapping requested by EFI_MEMORY_RP.
Restore the pure no-read behavior by leaving the PTE present and valid
and relying on PAGE_NO_READ to request a read-protected mapping. A PTE
with P=1, V=1, and NR=1 should fault a data load with a
non-readable-page exception in both the hardware page-table-walk and
software TLB refill paths.
An older QEMU binary used during bring-up exposed an emulator issue in
the software refill path: the page-table PTE contained NR=1, but after
LDPTE/TLBFILL the guest TLB entry lost NR, so QEMU installed the mapping
as readable. That QEMU issue was fixed by:
2d877bc02a3b (target/loongarch: Preserve PTE permission bits in LDPTE)
That QEMU change preserves the architecturally defined LoongArch64 PTE
permission bits, including NR, NX, and RPLV, when LDPTE sanitizes the
hardware PTE. Newer QEMU and real hardware should therefore honor
PAGE_NO_READ without requiring firmware to make the mapping not present
or invalid.
Keeping PAGE_PRESENT and PAGE_VALID also avoids turning every
EFI_MEMORY_RP request into a fully invalid PTE. The NULL-page use case
still receives read protection through PAGE_NO_READ, while the
implementation remains aligned with the intended memory-attribute
semantics.
Link: https://github.com/qemu/qemu/commit/2d877bc02a3b
Signed-off-by: Dongyan Qian <[email protected]>
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