Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 0abce029801c1b1a2d84ee7c47534e291405b99b
https://github.com/tianocore/edk2/commit/0abce029801c1b1a2d84ee7c47534e291405b99b
Author: Chris Fernald <[email protected]>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
Log Message:
-----------
ArmPkg: Only flush cache for memory that is mapped and intentional
The previous commit to add cache flushing for memory being changed from
a cacheable memory to non-cacheable memory did not check if the new memory
type would be marked as a valid mapping. Because of this, if the
cacheability is changed on memory that has `EFI_MEMORY_RP` set, the flush
be VA would still be invoked which would cause a synchronous data abort.
Additionally, this commit removes flushing the cache if no attribute was
provided by the caller. It have been observed that in some cases,
including the core itself, the caller does not provide a cacheability
attribute and this code will default to a unused (so device) index. To
avoid unexpected behavior, we must ignore this scenario since it is
already in err and this shouldn't be made worse.
Signed-off-by: Chris Fernald <[email protected]>
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