Branch: refs/heads/angushe/instruction-api-riscv
Home: https://github.com/dyninst/dyninst
Commit: a0c36a441b0d9de864e6a5ae134a90cf9894751f
https://github.com/dyninst/dyninst/commit/a0c36a441b0d9de864e6a5ae134a90cf9894751f
Author: wxrdnx <[email protected]>
Date: 2025-11-08 (Sat, 08 Nov 2025)
Changed paths:
M common/src/arch-riscv64.h
Log Message:
-----------
Use using instead of typedef
Commit: 9f4f81d4e523003a261e3ac16280e8d909bc4701
https://github.com/dyninst/dyninst/commit/9f4f81d4e523003a261e3ac16280e8d909bc4701
Author: wxrdnx <[email protected]>
Date: 2025-11-08 (Sat, 08 Nov 2025)
Changed paths:
M instructionAPI/h/Instruction.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/decoder/riscv/decoder.C
Log Message:
-----------
Use overloaded addSuccessor
Commit: 07a8f9a5ea9e034f0ce50618b47eb59a9fa38a92
https://github.com/dyninst/dyninst/commit/07a8f9a5ea9e034f0ce50618b47eb59a9fa38a92
Author: wxrdnx <[email protected]>
Date: 2025-11-08 (Sat, 08 Nov 2025)
Changed paths:
M instructionAPI/src/decoder/type_conversion.h
Log Message:
-----------
Add header guard for type_conversion.h
Compare: https://github.com/dyninst/dyninst/compare/f94e48a81ed8...07a8f9a5ea9e
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