Branch: refs/heads/master
Home: https://github.com/dyninst/dyninst
Commit: 43b75762a130ee923f88f8a1608cd0fdcc3bbf56
https://github.com/dyninst/dyninst/commit/43b75762a130ee923f88f8a1608cd0fdcc3bbf56
Author: Dmitry Koltunov <[email protected]>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M common/src/arch-x86.C
Log Message:
-----------
x86: add support for decoding multiple instructions and fix decoding of
supported instructions (#1760)
* x86: add support for blsr, blsmsk, blsi with mem operand
Signed-off-by: koltunov <[email protected]>
* x86: add support for adcx, adox instructions
Signed-off-by: koltunov <[email protected]>
* x86: add support for vblendpd, vpblendw and fix blendps, blendpd, pblendw,
vblendps instructions
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of vpmaskmovd,vpmaskmovq instructions
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of pextrb, pextrw and add vpextrw with opcode 0x15
Move pextrb and pextrw instructions to the correct position in sse_ter_table
since they are prefixed with 66 and not F2. Add support for decoding of EVEX
prefixed vpextrw instruction. Make operands of vpextrw and vpextrb instructions
consistent with Intel manual. Add support for decoding a variant of vpextrw
instruction with opcode 0x15.
Signed-off-by: koltunov <[email protected]>
* x86: add rorx to vexw table
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of dpps and add vdpps instruction
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of pcmpestrm and add vpcmpestrm instruction
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of vbroadcastf128, movntdqa, mpsadbw, vmovntpd, vmovntps,
vmovntdqa
Signed-off-by: koltunov <[email protected]>
* x86: fix decoding of roundps/pd/ss/sd, vrndscaleps/pd/ss/sd and add
vroundps/pd/ss/sd instructions
Signed-off-by: koltunov <[email protected]>
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