On 7/16/20 5:37 PM, David Blaikie wrote:
On Thu, Jul 16, 2020 at 4:25 PM Michael Eager <ea...@eagercon.com
The language used to describe segmented addressing in DW_AT_segment
reads to me like the same language used to describe segmented addresses
in debug_aranges - it reads to me like they refer to the same concept.
What aspect of the wording do you find distinguishes between these two
discussions on segmented addresses?
They refer to the same segmented addresses.
There are not two discussions of segmented addresses in the DWARF spec.
Reread my previous comment about the meaning of segment as used in
DW_AT_segment. You apparently want it to mean something different.
There seems to be some significant disconnect between how we're each
understanding these concepts - could you help me understand/perhaps use
different language that might help me understand/connect with your
reading/understanding here? I'm trying my best to understand what the
spec is saying/how to interpret it.
DW_AT_segment was intended to support addressing schemes like that used
by x86 models. The description is somewhat generalized, but that is the
core of the concept. If Intel used different terminology for their
scheme, we would have used a different name. In their usage, a
segmented address maps (many-to-one) on a linear address space.
Whether DW_AT_segment can be used to support a more general concept of
disjoint address spaces is unclear. AFAIK, no one has used it for this
purpose. DW_AT_address_class has been used, as I understand it, but I'm
not familiar with these architectures.
You've mentioned they can be used - but I'm still pretty confused by how
they would be used to achieve that result. Do you happen to know of an
implementation that uses them in this way/any examples of DWARF using
the feature? I think that'd be realyl helpful to ground the discussion
with concrete examples.
I've given you a concrete example: x86.
My reading still seems to indicate that all the dwarf sections are meant
to use segment-relative addresses (all the wording for address size says
it should be the segment-relative address size, not an address in an
alternative linear address space)
The majority (that is, all but one) of architectures use flat address
spaces and have segment size = 0.
The fact that DWARF supports an architecture which has a non-zero
segment size should not be taken (as you appear to) to imply that all
architectures must be somehow compelled to use non-zero segment size.
The availability of a feature does not mandate its use.
It sounds like you're suggesting that an implementation may choose on a
per-section basis whether to use segmented addressing (because this
assumes an existing alternative linear addressing per x86) - and that
some sections /require/ the use of that linear addressing mode. Is that
the idea?
An x86 memory model implementation might use segmented addressing in the
.debug_info section, but not in the .debug_line section.
Given the aliasing in x86 segmented memory, I'm not sure how it could be
supported in the line table.
But the segmented addressing section seems to say "addresses are
specified as offsets within a given segment rather than as locations
within a single flat address space" - sounds like it's talking about
systems where there is no flat address space, in which case the sections
requiring a linear addressing would present a problem when it comes to
rendering them in DWARF.
You are reading more into the text than is there. Indeed, the example
given does have a linear address space.
If you want a concrete example, x86. If you want to postulate an
architecture which cannot be described in DWARF, have at it, but it's
not a fruitful or illuminating discussion.
DWARF uses the same description for segmented addresses almost
everywhere that an address is used. This is for consistency. The
meaning is the same everywhere.
If the meaning is the same everywhere, then it seems strange that it's
not supported everywhere (such as debug_rnglist/ranges) - the meaning
used in 2.12 seems to talk about a possible architecture that can only
be addressed via segmented addressing, without an alternative linear
address space - yet there are bits of DWARF where support for such an
architecture seems to be missing/incomplete.
Section 2.12 does not mention or imply any possible or hypothetical
architecture which has the restrictions you suggest. It mentions the
same one I've repeated multiple times.
Whether DWARF can describe the kind of architecture which you
hypothesize is moot. When you have such an architecture and wish to
support it in DWARF, then you would have something real to discuss.
I'd love to see some concrete examples of this sort of DWARF if you know
of any producer that uses this feature.
Check if GCC still generates code for x86. Or find an old version.
--
Michael Eager
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