On 01/27/2017 07:19 AM, Andreas Arnez wrote:
On Thu, Jan 26 2017, Michael Eager wrote:
I don't understand the assertion that "most significant" can not be
applied to registers. In the case where a register contains a single
value, this appears to be unambiguous. When a register contains
multiple values (some architectures support 2 16-bit values in a
32-bit register, for example), then additional clarification may be
needed. The ABI provides this, usually. The situation where a single
value is split across two registers is similar. When discussing
compound values (such as floating point) it is common to say that the
sign bit is in the most-significant bit of the register, without
ambiguity.
Hm, can you point to a formal definition? The usual definition of
"most/least significant bit" assumes that the underlying object is a
single binary integer:
https://en.wikipedia.org/wiki/Least_significant_bit
And I see how all this still makes sense for registers that can
"naturally" contain full-sized integers. But not in general. You
already list some cases that aren't that obvious, and there are many
more. When you say "the ABI provides this [clarification], usually",
where did you see that? For instance, when looking at the System V
Application Binary Interface AMD64 Architecture Processor Supplement
Draft Version 0.99.7, I don't see any definition related to DWARF
pieces, nor a clarification of the terms "most/least signficant bit" of
a register. Did you see something like that in any other ABI?
There are architectures which support performing arithmetic on multiple
values in a register, say two 16-bit values in a 32-bit register. The
ISA defines sign bits in each half, and the operations are defined so
that overflow in one half does not affect the other.
Maybe I'm too picky, but IMO a standard document should rely on formally
defined terms only. And "least significant bit", when applied to a
register, is not one of those, I think.
Perhaps we do need a comment that registers are viewed as a sequence
of bits.
--
Michael Eager ea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
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