2010/2/17 Dave Airlie <[email protected]>: > 2010/2/18 Rafał Miłecki <[email protected]>: >> Ported from DDX >> > > The PCIE regs on r600 are the same offsets at the ones on rv370 from > what I can see > probably don't need to add a new PCIE_P struct at all I think the > rv370 functions should work. >
There are PCIE index regs at the same offset, but the PCIE lane controls moved to the PCIE PORT index. Alex > Dave. > > ------------------------------------------------------------------------------ > Download Intel® Parallel Studio Eval > Try the new software tools for yourself. Speed compiling, find bugs > proactively, and fine-tune applications for parallel performance. > See why Intel Parallel Studio got high marks during beta. > http://p.sf.net/sfu/intel-sw-dev > -- > _______________________________________________ > Dri-devel mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/dri-devel > ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
