On Wed, 16 Sep 2009 00:12:21 +0200
Michel Dänzer <[email protected]> wrote:

> On Wed, 2009-09-16 at 08:02 +1000, Dave Airlie wrote: 
> > 2009/9/16 Michel Dänzer <[email protected]>:
> > > From: Michel Dänzer <[email protected]>
> > >
> > 
> > This one confuses me, the bit depth and stuff should
> > all be setup in the set base function, I wonder
> > is there a bug somewhere that we aren't dealing with.
> 
> There's definitely a bug somewhere. Without this, with fbcon at depth
> 16 the X server visibly stays in 16 bpp mode with 32 bpp data - funky
> effect.

We had a similar bug on the intel side; turned out our pipe base
function wasn't masking out the depth bits, just or'ing them in, so the
correct setting wouldn't take effect if the depth changed in some cases.

Not that I've looked at the radeon bits...

-- 
Jesse Barnes, Intel Open Source Technology Center

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