http://bugs.freedesktop.org/show_bug.cgi?id=13980
Summary: Texture Depth Limitations in R200
Product: Mesa
Version: unspecified
Platform: All
OS/Version: All
Status: NEW
Severity: major
Priority: medium
Component: Drivers/DRI/r200
AssignedTo: [email protected]
ReportedBy: [EMAIL PROTECTED]
The R200 driver supports 3D textures of 256x256x256.
However, using an opensource OpenRM scenegraph (http://www.openrm.org), it
looks like the volume is only rendered "half" in the Z direction.
For instance, a 256x256x32 volume would render right. But a 256x256x64 volume
would render only "half" in the Z direction. The other half appears garbled.
This issue was discussed extensively on dri-users list. A patch was sent by
Roland Scheidegger which fixed the issue on my FreeBSD system. The patch is
reproduced here:
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 4c85371..921a56e 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -1663,7 +1663,7 @@ static int radeon_cp_dispatch_texture(st
u32 height;
int i;
u32 texpitch, microtile;
- u32 offset;
+ u32 offset, byte_offset;
RING_LOCALS;
if (radeon_check_and_fixup_offset(dev_priv, file_priv, &tex->offset)) {
@@ -1841,6 +1841,7 @@ static int radeon_cp_dispatch_texture(st
}
#undef RADEON_COPY_MT
+ byte_offset = (image->y & ~2047) * image->width * (tex_width /
tex->width);
buf->file_priv = file_priv;
buf->used = size;
offset = dev_priv->gart_buffers_offset + buf->offset;
@@ -1855,9 +1856,9 @@ static int radeon_cp_dispatch_texture(st
RADEON_DP_SRC_SOURCE_MEMORY |
RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
OUT_RING((spitch << 22) | (offset >> 10));
- OUT_RING((texpitch << 22) | (tex->offset >> 10));
+ OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset
>> 10)));
OUT_RING(0);
- OUT_RING((image->x << 16) | image->y);
+ OUT_RING(((image->x + (byte_offset % 1024) / (tex_width /
tex->width)) << 16) | (image->y % 2048));
OUT_RING((image->width << 16) | height);
RADEON_WAIT_UNTIL_2D_IDLE();
ADVANCE_RING();
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