That makes sense, because (from my understanding) this chipset is
basically an ATI northbridge with an attached Radeon x300 GPU. This is
what enables them to do their "UMA+Sideport interleaving" technology, I
guess; since the Xpress chip *is* the northbridge, it has direct access
to system memory and to the Sideport dedicated memory. Hope this helps.
Dave Airlie airlied-at-linux.ie |rivatv-devel| wrote:
Hey all,
I took these register dumps from my Radeon Xpress 200M using the hw_script
program and the read_radeon_pcie.scp script. One is from a clean startup, and
the other one was taken from an X session. If there's anything else I can do,
let me know, I'm eager to help.
So these chips have a completly different memory controller than the real
PCIE chips, so they aren't going to work with my driver changes for
PCIE, I have some info on them but I've no idea how the hell to set them
up correctly at all, they appear to be some sort of AGP based chipset...
I'm going to see one at LCA, but looking at the info I have it might be a
bit of work to get DRI going on it ..
Dave.
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