On Sun, 30 Mar 2003, Keith Whitwell wrote:
>
> The server reset bug that was fixed was radeon-specific. I've been trying
> with the dri trunk & can't reproduce the hang on one 845 box, though I've got
> another & can try that too.
In case you care, this is a shuttle mini-pc:
00:00.0 Host bridge: Intel Corp. 82845G/GL [Brookdale-G] Chipset Host Bridge (rev 03)
Subsystem: Holco Enterprise Co, Ltd/Shuttle Computer: Unknown device fb50
Flags: bus master, fast devsel, latency 0
Memory at e8000000 (32-bit, prefetchable) [size=64M]
Capabilities: <available only to root>
00:02.0 VGA compatible controller: Intel Corp. 82845G/GL [Brookdale-G] Chipset
Integrated Graphics Device (rev 03) (prog-if 00 [VGA])
Subsystem: Holco Enterprise Co, Ltd/Shuttle Computer: Unknown device fb50
Flags: bus master, fast devsel, latency 0, IRQ 16
Memory at e0000000 (32-bit, prefetchable) [size=128M]
Memory at ec100000 (32-bit, non-prefetchable) [size=512K]
Capabilities: <available only to root>
and I also get
mtrr: base(0xe0020000) is not aligned on a size(0x300000) boundary
where the 3MB mtrr thing seems to match the frame buffer address:
(II) I810(0): [drm] created "i830" driver at busid "PCI:0:2:0"
(II) I810(0): [drm] added 8192 byte SAREA at 0xe0124000
(II) I810(0): [drm] mapped SAREA 0xe0124000 to 0x40015000
(II) I810(0): [drm] framebuffer handle = 0xe0020000
(II) I810(0): [drm] added 1 reserved context for kernel
(II) I810(0): Allocated 3072 kB for the back buffer at 0x7800000.
(II) I810(0): Allocated 3072 kB for the depth buffer at 0x7400000.
(II) I810(0): Allocated 32 kB for the logical context at 0x73f8000.
(II) I810(0): Allocated 1024 kB for the DMA buffers at 0x72f8000.
(II) I810(0): Allocated 3840 kB for textures at 0xffc40000
I don't know why it wants to cover only 3MB, since I assume it really
should cover the whole 8MB area. Whatever.
Linus
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