Ian Romanick wrote:
Leif Delgass wrote:
On Wed, 5 Feb 2003, Ian Romanick wrote:
[...]
Regarding glean, I need to test again, but I was seeing some other
failures even with the mesa-4-0-4 and trunk. I think there were some
off-by-one scissor errors and a couple of others. One question I had was
whether the Radeon driver should really advertise a destination alpha
channel. At depth 24, glxinfo reports 8 bit alpha for color and accum
buffers. This doesn't seem to be consistent across the drivers. Some
don't even seem to be consistent for a given entry between alpha bits,
alpha mask, and buffer size. Here's a little chart I made a while back:
Some time ago there were some scissor problems that caused every glean
test to always fail. I think those were fixed in the radeon and r200
drivers about 6 months ago. On my R100 the only tests that failed for
me were the subtract tests and the alpha channel in some combinations of
DOT3. I haven't had a chance to dig into that either.
Intuitively, it seems that NONE of these drivers, except Mach64 &
Rage128, is reporting the right thing. There seems to be at least one
field wrong in each. I'm not 100% clear on the meaning of all the
fields, so I could be wrong. Hopefully Brian or Keith can enlighten us
on what they should mean. :) I'm mostly unsure of what amask means in
this context.
The mask values indicate which bits in the pixel (word) correspond to each
color channel. The buffer size is the sum of the red, green, blue, and alpha
bits.
Mach64/R128
r g b a amask bsz ar ag ab aa Xvisual dpth
5 6 5 0 00000000 16 16 16 16 0 16
8 8 8 0 00000000 24 16 16 16 0 24
AFAIK, Mach64 doesn't support destination alpha. This looks correct.
Radeon/R200
r g b a amask bsz ar ag ab aa Xvisual dpth
5 6 5 0 00000000 16 16 16 16 0 16
8 8 8 8 ff000000 24 16 16 16 16 24
bufferSize should be set to 32 in radeon_dri.c
Shouldn't this be one of the following?
8 8 8 0 00000000 32 16 16 16 0 24
8 8 8 8 00000000 32 16 16 16 16 24
I know that in the XFree86 Radeon driver in 24-bit each pixel is
actually 4 bytes, whether the alpha channel is used or not.
MGA
r g b a amask bsz ar ag ab aa Xvisual dpth
5 6 5 0 00000000 16 16 16 16 0 16
8 8 8 8 00000000 32 16 16 16 0 24
alphaMask should be 0xff000000.
8 8 8 8 00000000 32 16 16 16 16 24
GLINT
r g b a amask bsz ar ag ab aa Xvisual dpth
5 5 5 5 000f1000 16 16 16 16 0 15 (pScrn->depth)
8 8 8 0 00000000 32 16 16 16 0 24 (pScrn->depth)
This might be right.
Looks OK.
tdfx
r g b a amask bsz ar ag ab aa Xvisual dpth
5 6 5 0 00000000 16 16 16 16 0 16
8 8 8 0 00000000 16 16 16 16 0 24 (pScrn->bitsPerPixel)
8 8 8 8 ff000000 16 16 16 16 16 32 (pScrn->bitsPerPixel)
8 8 8 0 00000000 32 16 16 16 0 24
8 8 8 8 00000000 32 16 16 16 16 24
In hw/drivers/tdfx/tdfx_dri.c bufferSize should be set to 32.
I'll check in corrections for these shortly. Thanks!
-Brian
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