Henry Worth wrote: > > Michel, > > How do these changes for r128 COMMIT_RING look? With these I can run > concurrent xine and glx programs in pci and agp mode with XV dma > disabled. > > With XV dma enabled, in both pci and agp mode, I can run xine for some > time without any hangs. But startup a glx program and X will hang until I > kill the glx program, and then X and xine will recover. I guess sync is the > next issue, I have a follow-on question on that below. > > The patch also includes a change to RING_SPACE_TEST..., based on > the radeon version, adding a register read fallback for determining ring > space.
I have no idea why there is a need for the RING_SPACE_TEST macro. It's disabled in the r200 branch. > The current drm r128 does not have any WAIT_UNTIL_*_IDLE macros. > I assume I'm going to need at least a general idle wait to address sync > issues. The only WAIT_UNTIL mask bit defined in r128_drv.h is for page > flip, are there any other bits available for wait functions? What does the r128 currently do to synchronize access to the framebuffer? It may be that 2d & 3d are synchronized by the hardware automatically, but you'll always need to do something before accessing the framebuffer directly. Keith ------------------------------------------------------- This sf.net email is sponsored by:ThinkGeek Welcome to geek heaven. http://thinkgeek.com/sf _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
