Michael,
Did you ever come up with a better way of organizing the codegen templates in
radeon_vtxfmt_x86.c ?
I've just been trying linking in a .o file build from assembly that looks like
this:
--------------
.text
.align 4
.globl _x86_3fv_3f
_x86_3fv_3f:
push %ebx
movl 4(%esp), %eax /* load 'v' off stack */
movl $0x12345678, %eax /* load buffer pointer */
movl (%eax), %ecx /* load v[0] */
movl 4(%eax), %edx /* load v[1] */
movl 8(%eax), %ebx /* load v[2] */
movl %ecx, (%eax) /* store v[0] to current vertex */
movl %edx, 4(%eax) /* store v[1] to current vertex */
movl %ebx, 8(%eax) /* store v[2] to current vertex */
pop %ebx
ret
.globl _x86_3fv_3f_end
_x86_3fv_3f_end:
------------------
With the idea that I'd memcpy the region between _x86_3fv_3f and
_x86_3fv_3f_end to a malloced area and then do fixup there.
However I'm getting odd & hard-to-explain results...
Keith
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