On 2002.05.25 17:16 Frank C. Earl wrote:
> On Saturday 25 May 2002 03:01 am, Jos� Fonseca wrote:
>
> > Wow! Bummer... I already had convinced myself that the card was secure!
>
> It is, if you don't rely on a register being set by something for your
> control of things. ...
Frank, Leif was pretty clear and I quote:
"it IS possible to derail a bus master in progress and set it
processing from a different table in mid-stream. Plus, if the address is
bogus or the table is misconstructed, this will cause an engine lockup and
take out DMA until the machine is cold restarted."
And this can happen regardless if a specific register is to be read or
not. (In fact, if you look at the test case you'll see that no register is
being read except for debugging purposes.)
> > Yep. It's not the end of the world, but it's gonna mean that the CPU
> will
> > be a little more stressed, and that we have much more code to do...
>
> If you guys don't mind, I'd like to revisit the work by modernizing my
> branch
> and finalizing what I'd started. I think it'd do well and make it secure
>
Sure, Frank. I wish you can prove us that we are wrong, but before you
dedicate too much time on it don't forget that now it's pretty
straightforward to come up with a test case to break the transfer. So if
you can't secure it in the end, your extra effort will be in vain.
Jos� Fonseca
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