On 2002.04.30 22:53 Leif Delgass wrote:
> ...
>
> There's a wrinkle for the vertex buffers though. The register offsets
> and
> data in the buffer have already been swapped to little-endian, whereas
> the
> state updates and such using the DMA* macros (which in turn use
> MACH64_WRITE) pass data to the macros in cpu endianess. So in the
> pseudo-DMA code in _dispatch_vertex, I changed the
>
> MACH64_WRITE(reg, *p++);
>
> to
>
> MACH64_DEREF(reg) = *p++;
>
> because the value (*p) is already little-endian, whereas the register
> address has to be swapped from little-endian back to big-endian for the
> MMSELECT(reg). So wouldn't you have to swap the value back to big-endian
> as well in order to use this modified MACH64_WRITE macro?
yes, indeed. I never check how you implemented that so I overlooked.
I attached a complete diff that should do the right thing. I believe this
is the only way to do this in a portable fashion, even if results in some
redundant work being done on bigendian machines. I also avoided to
increment the pointer inside the macros, just in case the le32_to_cpu
macro reuses it's argument.
Peter, apply it by making something like
patch -p1 -i mach64-endian-mmio.diff
in the xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel and
report back to us when you have time.
Jos� Fonseca
Index: mach64_drv.h
===================================================================
RCS file:
/cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Attic/mach64_drv.h,v
retrieving revision 1.1.6.3.2.10
diff -u -r1.1.6.3.2.10 mach64_drv.h
--- mach64_drv.h 30 Apr 2002 12:21:20 -0000 1.1.6.3.2.10
+++ mach64_drv.h 30 Apr 2002 22:37:35 -0000
@@ -354,9 +354,8 @@
#define MACH64_ADDR(reg) (MACH64_BASE(reg) + reg)
-#define MACH64_DEREF(reg) *(volatile u32 *)MACH64_ADDR(reg)
-#define MACH64_READ(reg) le32_to_cpu(MACH64_DEREF(reg))
-#define MACH64_WRITE(reg,val) do { MACH64_DEREF(reg) = cpu_to_le32(val); } while (0)
+#define MACH64_READ(reg) readl(MACH64_ADDR(reg))
+#define MACH64_WRITE(reg,val) writel(val, MACH64_ADDR(reg))
#define DWMREG0 0x0400
Index: mach64_state.c
===================================================================
RCS file:
/cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Attic/mach64_state.c,v
retrieving revision 1.1.6.4.2.16
diff -u -r1.1.6.4.2.16 mach64_state.c
--- mach64_state.c 28 Apr 2002 18:48:59 -0000 1.1.6.4.2.16
+++ mach64_state.c 30 Apr 2002 22:37:36 -0000
@@ -527,7 +527,8 @@
while ( used ) {
u32 reg, count;
- reg = le32_to_cpu(*p++);
+ reg = le32_to_cpu(*p);
+ p++;
used--;
count = (reg >> 16) + 1;
@@ -535,17 +536,21 @@
reg = MMSELECT( reg );
while ( count && used ) {
+ u32 data;
+
if ( !fifo ) {
if ( mach64_do_wait_for_fifo(
dev_priv, 16 ) < 0 )
return;
fifo = 16;
}
-
--fifo;
- /* data is already little-endian */
- MACH64_DEREF(reg) = *p++;
+
+ data = le32_to_cpu(*p);
+ p++;
used--;
+
+ MACH64_WRITE(reg, data);
reg += 4;
count--;