Based on the r128 and radeon code, here's a diff for atidri.c that
initializes the AGP registers and enables bus mastering in PCI config
space (in case it wasn't done on boot). Also, I tried setting GUI_CNTL to
0x00000001 and the dma test worked for me also!
--- atidri.orig.c Fri Oct 19 19:57:55 2001
+++ atidri.c Fri Oct 19 20:29:31 2001
@@ -35,6 +35,7 @@
#include "atistruct.h"
#include "ativersion.h"
+#include "atimach64io.h"
#include "mach64_dri.h"
#include "mach64_sarea.h"
@@ -607,10 +608,12 @@
"[agp] AGP Texture map mapped at 0x%08lx\n",
(unsigned long)pATI->agpTex);
- /* Initialize Rage 128's AGP registers */
+#endif
+
+ /* Initialize Mach64's AGP registers */
cntl = inr( AGP_CNTL );
cntl &= ~AGP_APER_SIZE_MASK;
- switch ( pATI->agpSize ) {
+ switch ( pATIDRIServer->agpSize ) {
case 256: cntl |= AGP_APER_SIZE_256MB; break;
case 128: cntl |= AGP_APER_SIZE_128MB; break;
case 64: cntl |= AGP_APER_SIZE_64MB; break;
@@ -621,12 +624,16 @@
default:
xf86DrvMsg( pScreen->myNum, X_ERROR,
"[agp] Illegal aperture size %d kB\n",
- pATI->agpSize*1024 );
+ pATIDRIServer->agpSize*1024 );
return FALSE;
}
- outr( AGP_BASE, pATIDRIServer->agpHandle );
+
+ /* Vertex buffers start at AGP offset 0 */
+ outr( AGP_BASE, pATIDRIServer->bufferHandle );
outr( AGP_CNTL, cntl );
-#endif
+
+ /* Enable bus mastering in PCI config space */
+ xf86EnablePciBusMaster(pATI->PCIInfo, TRUE);
return TRUE;
}
--
Leif Delgass
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