From: Ville Syrj?l? <[email protected]>

Take fb->offset[0] into account when calculating the linear and tile x/y
offsets.

For non-tiled surfaces fb->offset[0] is simply added to the linear
byte offset.

For tiled surfaces treat fb->offsets[0] as a byte offset into the
linearized view of the surface. So we end up converting fb->offsets[0]
into additional x and y offsets.

Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index f3fea88..a4eb64f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1952,6 +1952,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, 
struct drm_framebuffer *fb,
        unsigned long linear_offset;
        u32 dspcntr;
        u32 reg;
+       unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, 0);

        switch (plane) {
        case 0:
@@ -2010,13 +2011,12 @@ static int i9xx_update_plane(struct drm_crtc *crtc, 
struct drm_framebuffer *fb,

        I915_WRITE(reg, dspcntr);

-       linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
+       linear_offset = fb->offsets[0] + y * fb->pitches[0] + x * cpp;

        if (INTEL_INFO(dev)->gen >= 4) {
                intel_crtc->dspaddr_offset =
                        gen4_compute_dspaddr_offset_xtiled(&x, &y,
-                                                          fb->bits_per_pixel / 
8,
-                                                          fb->pitches[0]);
+                                                          cpp, fb->pitches[0]);
                linear_offset -= intel_crtc->dspaddr_offset;
        } else {
                intel_crtc->dspaddr_offset = linear_offset;
@@ -2049,6 +2049,7 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
        unsigned long linear_offset;
        u32 dspcntr;
        u32 reg;
+       unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, 0);

        switch (plane) {
        case 0:
@@ -2105,11 +2106,10 @@ static int ironlake_update_plane(struct drm_crtc *crtc,

        I915_WRITE(reg, dspcntr);

-       linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
+       linear_offset = fb->offsets[0] + y * fb->pitches[0] + x * 
(fb->bits_per_pixel / 8);
        intel_crtc->dspaddr_offset =
                gen4_compute_dspaddr_offset_xtiled(&x, &y,
-                                                  fb->bits_per_pixel / 8,
-                                                  fb->pitches[0]);
+                                                  cpp, fb->pitches[0]);
        linear_offset -= intel_crtc->dspaddr_offset;

        DRM_DEBUG_KMS("Writing base %08X %08lX %d %d %d\n",
-- 
1.7.8.6

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