From: Alex Deucher <[email protected]>
The logic was messy and hard to follow.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/radeon/atombios_crtc.c | 41 ++++++++++---------------------
1 files changed, 13 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index a515b2a..4901179 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -638,38 +638,23 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (ss_enabled && ss->percentage)
args.v3.sInput.ucDispPllConfig |=
DISPPLL_CONFIG_SS_ENABLE;
- if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT) ||
- radeon_encoder_is_dp_bridge(encoder)) {
+ if (encoder_mode == ATOM_ENCODER_MODE_DP) {
+ args.v3.sInput.ucDispPllConfig |=
+ DISPPLL_CONFIG_COHERENT_MODE;
+ /* 16200 or 27000 */
+ args.v3.sInput.usPixelClock =
cpu_to_le16(dp_clock / 10);
+ } else if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT)) {
struct radeon_encoder_atom_dig *dig =
radeon_encoder->enc_priv;
- if (encoder_mode ==
ATOM_ENCODER_MODE_DP) {
+ if (encoder_mode ==
ATOM_ENCODER_MODE_HDMI)
+ /* deep color support */
+ args.v3.sInput.usPixelClock =
+
cpu_to_le16((mode->clock * bpc / 8) / 10);
+ if (dig->coherent_mode)
args.v3.sInput.ucDispPllConfig
|=
DISPPLL_CONFIG_COHERENT_MODE;
- /* 16200 or 27000 */
- args.v3.sInput.usPixelClock =
cpu_to_le16(dp_clock / 10);
- } else {
- if (encoder_mode ==
ATOM_ENCODER_MODE_HDMI) {
- /* deep color support */
-
args.v3.sInput.usPixelClock =
-
cpu_to_le16((mode->clock * bpc / 8) / 10);
- }
- if (dig->coherent_mode)
-
args.v3.sInput.ucDispPllConfig |=
-
DISPPLL_CONFIG_COHERENT_MODE;
- if (mode->clock > 165000)
-
args.v3.sInput.ucDispPllConfig |=
-
DISPPLL_CONFIG_DUAL_LINK;
- }
- } else if (radeon_encoder->devices &
(ATOM_DEVICE_LCD_SUPPORT)) {
- if (encoder_mode ==
ATOM_ENCODER_MODE_DP) {
+ if (mode->clock > 165000)
args.v3.sInput.ucDispPllConfig
|=
-
DISPPLL_CONFIG_COHERENT_MODE;
- /* 16200 or 27000 */
- args.v3.sInput.usPixelClock =
cpu_to_le16(dp_clock / 10);
- } else if (encoder_mode !=
ATOM_ENCODER_MODE_LVDS) {
- if (mode->clock > 165000)
-
args.v3.sInput.ucDispPllConfig |=
-
DISPPLL_CONFIG_DUAL_LINK;
- }
+
DISPPLL_CONFIG_DUAL_LINK;
}
if (radeon_encoder_is_dp_bridge(encoder)) {
struct drm_encoder *ext_encoder =
radeon_atom_get_external_encoder(encoder);
--
1.7.1.1
