On Wed, Jun 10, 2026 at 03:13:58PM +0100, Gary Guo wrote: > From: Gary Guo <[email protected]> > > No functional changes intended. > > Signed-off-by: Gary Guo <[email protected]> > --- > drivers/gpu/drm/tyr/regs.rs | 14 ++------------ > 1 file changed, 2 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs > index 562023e5df2f..831357a8ef87 100644 > --- a/drivers/gpu/drm/tyr/regs.rs > +++ b/drivers/gpu/drm/tyr/regs.rs > @@ -48,17 +48,12 @@ pub(crate) fn read_u64_no_tearing(lo_read: impl Fn() -> > u32, hi_read: impl Fn() > /// These registers correspond to the GPU_CONTROL register page. > /// They are involved in GPU configuration and control. > pub(crate) mod gpu_control { > - use core::convert::TryFrom; > use kernel::{ > - error::{ > - code::EINVAL, > - Error, // > - }, > num::Bounded, > + prelude::*, > register, > uapi, // > }; > - use pin_init::Zeroable; > > register! { > /// GPU identification register. > @@ -964,14 +959,9 @@ pub(crate) mod mmu_control { > /// > /// This array contains 16 instances of the MMU_AS_CONTROL register page. > pub(crate) mod mmu_as_control { > - use core::convert::TryFrom; > - > use kernel::{ > - error::{ > - code::EINVAL, > - Error, // > - }, > num::Bounded, > + prelude::*, > register, // > }; > > > base-commit: 7d570075805918f5ec33f03949c6a7c610397340 > -- > 2.54.0 >
Acked-by: Deborah Brouwer <[email protected]>
