Each core allocated an ordered workqueue ("rocket-reset-%d") and passed
it as the scheduler's timeout_wq. The only documented reason to provide a
custom timeout_wq is to serialize the timeout handlers of several
schedulers that share globally-reset hardware. That does not apply here:
each core has its own scheduler and is reset independently
(rocket_reset() only touches its own core). With the reset worker gone,
the workqueue served solely as the timeout_wq.Drop it and let drm_sched fall back to the default timeout workqueue. Signed-off-by: Maíra Canal <[email protected]> --- drivers/accel/rocket/rocket_core.h | 4 ---- drivers/accel/rocket/rocket_job.c | 15 +-------------- 2 files changed, 1 insertion(+), 18 deletions(-) diff --git a/drivers/accel/rocket/rocket_core.h b/drivers/accel/rocket/rocket_core.h index f74dc99d07bb..607e4270f59c 100644 --- a/drivers/accel/rocket/rocket_core.h +++ b/drivers/accel/rocket/rocket_core.h @@ -46,10 +46,6 @@ struct rocket_core { spinlock_t fence_lock; - struct { - struct workqueue_struct *wq; - } reset; - struct drm_gpu_scheduler sched; u64 fence_context; u64 emit_seqno; diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocket_job.c index 871041eb7a1d..1a454559ecf4 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -467,33 +467,20 @@ int rocket_job_init(struct rocket_core *core) return ret; } - core->reset.wq = alloc_ordered_workqueue("rocket-reset-%d", 0, core->index); - if (!core->reset.wq) - return -ENOMEM; - core->fence_context = dma_fence_context_alloc(1); - args.timeout_wq = core->reset.wq; ret = drm_sched_init(&core->sched, &args); if (ret) { dev_err(core->dev, "Failed to create scheduler: %d.", ret); - goto err_sched; + return ret; } return 0; - -err_sched: - drm_sched_fini(&core->sched); - - destroy_workqueue(core->reset.wq); - return ret; } void rocket_job_fini(struct rocket_core *core) { drm_sched_fini(&core->sched); - - destroy_workqueue(core->reset.wq); } int rocket_job_open(struct rocket_file_priv *rocket_priv) -- 2.54.0
