Hi Dave, Simona, Pull for v7.2, as described below.
There is a new ioctl for perfcntr support. Corresponding mesa MR for that is: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158 The following changes since commit 254f49634ee16a731174d2ae34bc50bd5f45e731: Linux 7.1-rc1 (2026-04-26 14:19:00 -0700) are available in the Git repository at: https://gitlab.freedesktop.org/drm/msm.git tags/drm-msm-next-2026-05-30 for you to fetch changes up to 9a967125427e03c7ebc24d7ad26e9307e8403d4e: drm/msm/adreno: add Adreno 810 GPU support (2026-05-29 07:07:31 -0700) ---------------------------------------------------------------- Changes for v7.2 Core: - Fixed documentation for msm_gem_shrinker functions - IFPC related enablement/fixes for gen8 - PERFCNTR_CONFIG ioctl support GPU - Reworked handling of UBWC configuration - a810 suppport MDSS: - Added Milos platform support - Reworked handling of UBWC configuration DisplayPort: - Reworked HPD handling, preparing for the MST support DPU: - Added Milos platform support - Reworked handling of UBWC configuration DSI: - Added Milos platform support ---------------------------------------------------------------- Akhil P Oommen (4): drm/msm/a8xx: Make a8xx_recover IFPC safe drm/msm/a6xx: Limit GXPD votes to recovery in A8x drm/msm/a8xx: Fix RSCC offset dt-bindings: display/msm: gpu: Document Adreno X2-185 Alexander Koskovich (7): drm/msm: Fix GMEM_BASE for A650 dt-bindings: display/msm/gmu: Document Adreno 810 GMU dt-bindings: display/msm/gpu: Document Adreno 810 GPU drm/msm/adreno: rename llc_mmio to cx_misc_mmio drm/msm/adreno: set cx_misc_mmio regardless of if platform has LLCC drm/msm/a8xx: use pipe protect slot 15 for last-span-unbound feature drm/msm/adreno: add Adreno 810 GPU support Chen Ni (1): drm/msm/a6xx: Check kzalloc return in a8xx_hfi_send_perf_table Daniel J Blueman (1): drm/msm: Fix shrinker deadlock Dmitry Baryshkov (30): drm/msm/dsi: don't dump registers past the mapped region drm/msm/dpu: don't mix devm and drmm functions drm/msm/adreno: fix userspace-triggered crash on a2xx-a4xx drm/msm/snapshot: fix dumping of the unaligned regions soc: qcom: ubwc: define UBWC 3.1 soc: qcom: ubwc: define helper for MDSS and Adreno drivers soc: qcom: ubwc: add helper controlling AMSBC enablement Merge branch '[email protected]' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into HEAD drm/ci: disable mr-label-maker-test drm/msm/mdss: correct UBWC programming sequences drm/msm/adreno: use qcom_ubwc_version_tag() helper drm/msm/mdss: use qcom_ubwc_version_tag() helper drm/msm/adreno: use new helper to set min_acc length drm/msm/mdss: use new helper to set min_acc length drm/msm/adreno: use new helper to set macrotile_mode drm/msm/mdss: use new helper to set macrotile_mode drm/msm/mdss: use new helper to set UBWC bank spreading drm/msm/adreno: use new helper to set ubwc_swizzle drm/msm/dpu: use new helper to set ubwc_swizzle drm/msm/mdss: use new helper to set ubwc_swizzle drm/msm/adreno: write reserved UBWC-related bits drm/msm/adreno: set fp16compoptdis for UBWC 3.0 formats drm/msm/adreno: use new helper to set amsbc drm/msm/adreno: use version ranges in A8xx UBWC code drm/msm/mdss: use new helper to set amsbc drm/msm/dpu: drop ubwc_dec_version drm/msm/dpu: invert the order of UBWC checks drm/msm/dp: drop event data drm/msm/dp: turn link_ready into plugged drm/msm/dp: clear EDID on display unplug Felix Gu (1): drm/msm/adreno: Fix a reference leak in a6xx_gpu_init() Jessica Zhang (7): drm/msm/dp: fix HPD state status bit shift value drm/msm/dp: Fix the ISR_* enum values drm/msm/dp: Read DPCD and sink count in bridge detect() drm/msm/dp: Move link training to atomic_enable() drm/msm/dp: Drop EV_USER_NOTIFICATION drm/msm/dp: rework HPD handling drm/msm/dp: Add sink_count to debug logs Konrad Dybcio (1): drm/msm/adreno: Trust the SSoT UBWC config Krzysztof Kozlowski (5): dt-bindings: display/msm: dp-controller: Correct SM8650 IO range dt-bindings: display/msm: dp-controller: Allow DAI on SM8650 and others dt-bindings: display/msm: sm8650: Correct VBIF range in example dt-bindings: display/msm: sm8750-mdss: Correct DPU and DP ranges in example dt-bindings: display/msm: qcom,eliza-mdss: Correct DPU and DP ranges in example Lad Prabhakar (1): dt-bindings: display/msm: Fix typo in clock-names property Luca Weiss (7): dt-bindings: display: msm-dsi-phy-7nm: document the Milos DSI PHY dt-bindings: display: msm-dsi-controller-main: document the Milos DSI Controller dt-bindings: display: msm: document the Milos DPU dt-bindings: display: msm: document the Milos Mobile Display Subsystem drm/msm/dsi: add support for DSI-PHY on Milos drm/msm: mdss: Add Milos support drm/msm/dpu: Add Milos support Mahadevan P (1): drm/msm/dpu: Fix Kaanapali CWB register configuration Mikko Perttunen (1): drm/msm: Fix iommu_map_sgtable() return value check and avoid WARN Nathan Chancellor (1): drm/msm: Restore second parameter name in purge() and evict() Neil Armstrong (1): drm/msm/dpu: fix UV scanlines calculation for YUV UBWC formats Rob Clark (18): drm/msm/a6xx: Restore sysprof_active drm/msm: Correct modparam description drm/msm: Remove obsolete perf infrastructure drm/msm: Allow CAP_PERFMON for setting SYSPROF drm/msm/adreno: Sync registers from mesa drm/msm/registers: Sync gen_header.py from mesa drm/msm/registers: Add perfcntr json drm/msm: Add a6xx+ perfcntr tables drm/msm: Add sysprof accessors drm/msm/a6xx: Add yield & flush helper drm/msm: Add per-context perfcntr state drm/msm: Add basic perfcntr infrastructure drm/msm/a6xx+: Add support to configure perfcntrs drm/msm/a8xx: Add perfcntr flush sequence drm/msm: Add PERFCNTR_CONFIG ioctl drm/msm/a6xx: Increase pwrup_reglist size drm/msm/a6xx: Append SEL regs to dyn pwrup reglist drm/msm/a6xx: Allow IFPC with perfcntr stream Uwe Kleine-König (The Capable Hub) (1): drm/msm: Don't use UTS_RELEASE directly .../bindings/display/msm/dp-controller.yaml | 28 +- .../bindings/display/msm/dsi-controller-main.yaml | 2 + .../devicetree/bindings/display/msm/gmu.yaml | 30 + .../devicetree/bindings/display/msm/gpu.yaml | 19 + .../bindings/display/msm/qcom,eliza-mdss.yaml | 20 +- .../bindings/display/msm/qcom,milos-mdss.yaml | 286 +++ .../bindings/display/msm/qcom,sm8650-dpu.yaml | 3 +- .../bindings/display/msm/qcom,sm8650-mdss.yaml | 2 +- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 16 +- .../devicetree/bindings/phy/qcom,dsi-phy-7nm.yaml | 1 + drivers/gpu/drm/ci/gitlab-ci.yml | 4 + drivers/gpu/drm/msm/Makefile | 29 +- drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 7 - drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 16 - drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 3 - drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 27 +- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 298 +++ drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 89 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 363 ++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 30 +- drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 2 + drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 2 +- drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 104 +- drivers/gpu/drm/msm/adreno/a8xx_preempt.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_device.c | 10 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 19 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 10 +- .../gpu/drm/msm/disp/dpu1/catalog/dpu_10_2_milos.h | 279 +++ .../drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 12 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 29 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 39 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 3 +- drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c | 28 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 16 - drivers/gpu/drm/msm/dp/dp_ctrl.h | 1 - drivers/gpu/drm/msm/dp/dp_display.c | 722 +++---- drivers/gpu/drm/msm/dp/dp_display.h | 3 +- drivers/gpu/drm/msm/dp/dp_drm.c | 63 +- drivers/gpu/drm/msm/dp/dp_drm.h | 2 + drivers/gpu/drm/msm/dp/dp_panel.c | 8 + drivers/gpu/drm/msm/dp/dp_panel.h | 2 + drivers/gpu/drm/msm/dp/dp_reg.h | 4 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 23 + drivers/gpu/drm/msm/msm_debugfs.c | 6 - drivers/gpu/drm/msm/msm_drv.c | 2 +- drivers/gpu/drm/msm/msm_drv.h | 13 +- drivers/gpu/drm/msm/msm_gem_shrinker.c | 40 +- drivers/gpu/drm/msm/msm_gpu.c | 123 +- drivers/gpu/drm/msm/msm_gpu.h | 104 +- drivers/gpu/drm/msm/msm_iommu.c | 5 +- drivers/gpu/drm/msm/msm_mdss.c | 125 +- drivers/gpu/drm/msm/msm_perf.c | 235 --- drivers/gpu/drm/msm/msm_perfcntr.c | 670 +++++++ drivers/gpu/drm/msm/msm_perfcntr.h | 155 ++ drivers/gpu/drm/msm/msm_ringbuffer.h | 2 + drivers/gpu/drm/msm/msm_submitqueue.c | 3 +- .../drm/msm/registers/adreno/a2xx_perfcntrs.json | 109 + drivers/gpu/drm/msm/registers/adreno/a3xx.xml | 8 +- drivers/gpu/drm/msm/registers/adreno/a5xx.xml | 141 +- .../drm/msm/registers/adreno/a5xx_perfcntrs.json | 128 ++ drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 1300 ++++++------ .../drm/msm/registers/adreno/a6xx_descriptors.xml | 71 +- .../gpu/drm/msm/registers/adreno/a6xx_enums.xml | 3 + .../drm/msm/registers/adreno/a6xx_perfcntrs.json | 112 ++ .../drm/msm/registers/adreno/a7xx_perfcntrs.json | 228 +++ .../drm/msm/registers/adreno/a8xx_descriptors.xml | 96 +- .../drm/msm/registers/adreno/a8xx_perfcntrs.json | 241 +++ .../drm/msm/registers/adreno/a8xx_perfcntrs.xml | 1929 ++++++++++++++++++ .../gpu/drm/msm/registers/adreno/adreno_common.xml | 42 + .../gpu/drm/msm/registers/adreno/adreno_pm4.xml | 50 +- drivers/gpu/drm/msm/registers/gen_header.py | 2079 +++++++++++--------- include/linux/soc/qcom/ubwc.h | 22 + include/uapi/drm/msm_drm.h | 48 + 80 files changed, 7624 insertions(+), 3133 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,milos-mdss.yaml create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_2_milos.h delete mode 100644 drivers/gpu/drm/msm/msm_perf.c create mode 100644 drivers/gpu/drm/msm/msm_perfcntr.c create mode 100644 drivers/gpu/drm/msm/msm_perfcntr.h create mode 100644 drivers/gpu/drm/msm/registers/adreno/a2xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a5xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a6xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.xml
