Hi Conor,
On 5/22/2026 3:54 AM, Conor Dooley wrote:
On Thu, May 21, 2026 at 04:08:26PM +0800, Damon Ding wrote:
RK3588 eDP controller requires HCLK_VO1 to access the VO1 GRF
registers and enable the video datapath.
Previously, the clock was enabled implicitly via the 'rockchip,vo-grf'
phandle reference, which allowed the eDP to work without explicitly
managing the hclk_vo1 clock. However, this is not safe or explicit.
To make the clock dependency explicit, enforce per-SoC clock-names
requirements:
- RK3288: 2 clocks (dp, pclk)
- RK3399: 3 clocks (dp, pclk, grf)
- RK3588: 3 clocks (dp, pclk, hclk)
Do not reuse the 'grf' clock name for RK3588 because it represents
a different clock with distinct control logic:
- The 'grf' clock is only for GRF register access and is toggled
dynamically during register access.
- The 'hclk' clock controls both GRF access and video datapath
gating, and must remain enabled during probe.
Fixes: f855146263b1 ("dt-bindings: display: rockchip: analogix-dp: Add support for
RK3588")
Signed-off-by: Damon Ding <[email protected]>
---
Changes in v4:
- Modify the commit msg.
Changes in v5:
- Enforce the correct third clock name on a per-compatible basis.
- Modify the commit msg simultaneously.
Changes in v6:
- Expand more detail commit msg about using hclk instead of grf clock.
---
.../rockchip/rockchip,analogix-dp.yaml | 37 +++++++++++++++++--
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
index d99b23b88cc5..8001c1facf98 100644
---
a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
+++
b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
@@ -23,10 +23,7 @@ properties:
clock-names:
minItems: 2
- items:
- - const: dp
- - const: pclk
- - const: grf
Instead of removing this, you can make it
items:
- const: dp
- const pclk
- enum:
- grf
- hclk
+ maxItems: 3
And delete this.
Oh I see, thanks for clarifying.
The idea is to keep all valid clock names at the top level, and use only
minItems/maxItems in allOf to differentiate platforms.
power-domains:
maxItems: 1
@@ -60,6 +57,33 @@ required:
allOf:
- $ref: /schemas/display/bridge/analogix,dp.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - rockchip,rk3288-dp
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: dp
+ - const: pclk
Then this becomes
clock-names:
maxItems: 2
clocks:
maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - rockchip,rk3399-edp
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: dp
+ - const: pclk
+ - const: grf
maybe this needs a minItems: 3? Depends on if the grf clock is
mandatory. Also probably needs a
clocks:
minItems: 3
if that's the case.
Yes, the minItems should be 3 for both clocks and clock-names.
+
- if:
properties:
compatible:
@@ -68,6 +92,11 @@ allOf:
- rockchip,rk3588-edp
then:
properties:
+ clock-names:
+ items:
+ - const: dp
+ - const: pclk
+ - const: hclk
And the same here as for the 3399.
Will update in v7.
Best regards,
Damon
