From: Sumit Garg <[email protected]>

Switch drm/msm client drivers over to generic PAS TZ APIs. Generic PAS
TZ service allows to support multiple TZ implementation backends like QTEE
based SCM PAS service, OP-TEE based PAS service and any further future TZ
backend service.

Signed-off-by: Sumit Garg <[email protected]>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  4 ++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 11 ++++++-----
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index ef9fd6171af7..3283852f9a14 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -5,7 +5,7 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/cpumask.h>
-#include <linux/firmware/qcom/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_pas.h>
 #include <linux/pm_opp.h>
 #include <linux/nvmem-consumer.h>
 #include <linux/slab.h>
@@ -653,7 +653,7 @@ static int a5xx_zap_shader_resume(struct msm_gpu *gpu)
        if (adreno_is_a506(adreno_gpu))
                return 0;
 
-       ret = qcom_scm_set_remote_state(SCM_GPU_ZAP_SHADER_RESUME, GPU_PAS_ID);
+       ret = qcom_pas_set_remote_state(SCM_GPU_ZAP_SHADER_RESUME, GPU_PAS_ID);
        if (ret)
                DRM_ERROR("%s: zap-shader resume failed: %d\n",
                        gpu->name, ret);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index d5fe6f6f0dec..047df0393128 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -8,6 +8,7 @@
 
 #include <linux/ascii85.h>
 #include <linux/interconnect.h>
+#include <linux/firmware/qcom/qcom_pas.h>
 #include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/kernel.h>
 #include <linux/of_reserved_mem.h>
@@ -146,10 +147,10 @@ static int zap_shader_load_mdt(struct msm_gpu *gpu, const 
char *fwname,
                goto out;
 
        /* Send the image to the secure world */
-       ret = qcom_scm_pas_auth_and_reset(pasid);
+       ret = qcom_pas_auth_and_reset(pasid);
 
        /*
-        * If the scm call returns -EOPNOTSUPP we assume that this target
+        * If the pas call returns -EOPNOTSUPP we assume that this target
         * doesn't need/support the zap shader so quietly fail
         */
        if (ret == -EOPNOTSUPP)
@@ -175,9 +176,9 @@ int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid)
        if (!zap_available)
                return -ENODEV;
 
-       /* We need SCM to be able to load the firmware */
-       if (!qcom_scm_is_available()) {
-               DRM_DEV_ERROR(&pdev->dev, "SCM is not available\n");
+       /* We need PAS to be able to load the firmware */
+       if (!qcom_pas_is_available()) {
+               DRM_DEV_ERROR(&pdev->dev, "Qcom PAS is not available\n");
                return -EPROBE_DEFER;
        }
 
-- 
2.51.0

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